On the one we used a simple game to describe the timing, but the timing of the microcontroller more complicated than this.
To further describe the timing, we combine the IIC protocol to describe.
IIC communication is very common in single-chip communication protocol, communication between the many hardware have to comply with this agreement, as to the origin of the agreement or something, I will not be discussed in detail, we can refer to some articles online. The following direct that communication process IIC protocol.
IIC protocol, there are two important concepts is SCL and SDA, SCL is what? Do not be English to Mongolia, and in fact the clock. SDA is what? In fact data. Here we introduce SCL and SDA IIC's timing.
1, the clock line, that is, SCL, above the clock signal is constantly, and this is not the same and drumming, not for a while will not knock a knock, nor is it a faster one will be slow;
2, data lines , which is the SDA, the above data is not go on and do, and SCL have to be consistent, for example, can only be time high level, SDA data is valid in SCL, it means that the device can be read on the SDA data; the contrary, can only SCL is at low level, in order to change the data on the SDA, what to change, for example, to upload 0,101,001 in SDA, the former is 0, the latter is 1, which is the change; previous 1, the latter is 0, also called the changes, both before and after 0, would not be called change. The changes that have restrictions, must wait until SCL is low when they could change, otherwise you have to hold it can not be changed. Data can not count further after the change, have to wait until SCL is high level dare confirm this data. To see more rules.
The beginning and end of that IIC has also been provided, just said, SCL high level when the data on the SDA was useful, for example, changes from high to low level (also known as a falling edge) on the SDA, it means the beginning , the level on the SDA changes from low to high (also known as the rising edge), it means an end.
Further data on the SDA transmissions have a certain order, can not be chaotic, for example, to transfer address is 7-bit binary number; Next retransmission data, 8-bit data is, of course, must have this intermediate confirmed, As long as no stop signal, you can always transfer data.
In fact after patient understanding, found that the timing is also quite interesting, in similar single-chip timing of this are numerous, in order to give you a better understanding of the timing, the next section we combine the timing diagram and to give you further explain the timing.
