Last year, the event HelloLLVM Hangzhou station, I had a share: LLVM backend Introduction . Mainly from the expansion of several major aspects of LLVM back end of a brief introduction to LLVM backend. In the new chip and instruction set fire today, adding a new backend for the LLVM, it has become a hot spot of concern to everyone.
LLVM official offers two official documents on the back end:
1、 The LLVM Target-Independent Code Generator
1 2 asked to read before reading. These two documents refer to read together, basically you can get all kinds of information needed to create a new back-end. These two documents from the three levels to resolve the back-end architecture, from the back-end code organization, execution and link building steps have said very clearly. We are here to take a look at these three levels:
1, the rear end of the six most
- Target description classes: abstract target description interfaces (代码地址：include/llvm/Target/)
- Marchine code description classes: classes used to repesent the code being generated for a target (代码地址：include/llvm/CodeGen/)
- The "MC" Layer: use to represent and process code at the raw machine code level
- Independent-Generation algorithms code the Target (Code Address: lib / CodeGen)
- Implementations of the abstract description interfaces for particular targets (代码地址： lib/Target)
- The JIT target-Independent Components of The (Code Address: lib / ExecutionEngine / JIT)
2, the back end of the seven sectors
- Instruction Selection
- Scheduling and Formation
- SSA-based Machine Code Optimizations
- Register Allocation
- Prolog/Epilog Code Insertion
- Late Machine Code Optimizations
- Code Emission
3, seven steps to create a new back-end
- Create a subclass of the TargetMachine class that describes characteristics of your target machine.
- Describe the register set of the target.
- Describe the instruction set of the target.
- Describe the selection and conversion of the LLVM IR from a Directed Acyclic Graph (DAG) representation of instructions to native target-specific instructions.
- Write code for an assembly printer that converts LLVM IR to a GAS format for your target machine.
- Optionally, add support for subtargets.
- Optionally, add JIT support and create a machine code emitter (subclass of TargetJITInfo) that is used to emit binary code directly into memory.
These three levels are different dimensions to examine the LLVM backend, each dimension self-contained, there is a corresponding relationship between different dimensions. Follow-up will also write articles analyze the relationship between them.