http://www.elecfans.com/emb/fpga/20171122583385.html
any embedded system-level design are inseparable interrupted for Zynq with dual cotex-A9 is the same. Zynq interrupt designed by ARM and GIC pl390 interrupt controller, for receiving IOP (I / O peripherals) signal PL. Shown, the CPU interrupt below into PPIs (private peripheral interrupts), SGIs (software generated interrupts) with SPIs (shared peripheral interrupts) wherein SGIS be generated by writing GIC (generic interrupt controller) registers. From ug585 manual Xilinx given you can clearly see the relationship between GIC and PPIs, SCIs, SPIs of. GIC can manage the interrupt generated from the PL portion PS, and its setting is made to enable, priority, etc., and the same ARM general, all interrupts are given an interrupt ID, which the CPU is used.
For SPIs, the interrupt source signals can be generated in any subsystem PS or PL moiety from the IOP. The following figure shows a block diagram of the interrupt controller, better able to reflect the relationship PPIs, SPIs, SGIs, and will be processed corresponding thereto from CPU interface interrupt response.
Here are three interrupt it said, for SGIs, every CPU core can be a response to their own, or interrupt other two CPU cores by SGIs, controlled by writing ICDSGIR SGIs controller, ICDICFR0 control SGIs priority register and the trigger condition, which is a read-only register, so we can see SGIs trigger condition is rising and can not be changed.
对于PPIs来说，每一个CPU都连接到5个PPI，同样的，ICDICFR1为PPIs的优先级及触发条件控制寄存器，是只读的，因而PPIs的触发条件也不可更改。需要注意到的是，PL部分的快速响应中断FIQ(fast interrupt)信号与普通中断IRQ(interrupt)需要被送往中断控制器中，所以即便ICDICFR1规定IRQ与FIQ的响应等级为low level，但是他们的在PS与PL接口的响应等级仍是high。
最后是SPIs，有多达60种中断类型可以由任一CPU或者PL部分产生，为了响应这么多的中断，我们必须对GIC进行编写，但是Zynq启动的过程中并没有对GIC进行编写，因此我们需要在SDK中对其进行编辑。同样的，这些中断的触发条件也已经被规定了，不能够进行更改。SPI的中断太多了，不一一列举，大家可以去ug585中查看这些中断。但是让笔者比较疑惑的是，既然中断的触发类型不能够被更改，为什么SDK的库中会有更改中断触发形式的函数呢。GIC是Zynq中断的大脑，这些中断远不能达到GIC pl39所能控制的极限。
我们以一个简单地中断响应程序来作为例子，了解如何使用Zynq的中断，同样的使用XPS+SDK来进行设计。
首先我们使用BSB新建工程；
同样的选择ZC702，删除所有的外设；
添加两个个GPIO外设的IP核，一个外设作为LED显示，另一个外设作为中端IO，这里记得在中端IO的设置中勾选interruput使能，不需要对GPIO做其他设置；
下一步要将GPIO外设加入中断中，可以看到IRQ_F2P没有任何连接；
我们将中断IO加入IRQ，单击L to H : no connecTIon，添加中断源；
XPS parts to the finished design, generating a bit stream, after introducing the SDK, software design. SDK provides us with the use of interrupts libraries xscugic.h (system control unit generic interrupt controller), no abbreviations found scu, and just assume that is the abbreviation of the system control unit, is better understood.
Interrupt setting is very simple, like other microcontroller programs, mainly in the following sections
Firstly GPIO initialization, this does not need to say.
Secondly interrupt settings, such as interrupt control, the global interrupt enable the like, with the following main functions
XScuGic_LookupConfig interrupt settings Find
XScuGic_CfgIni TI Alize GIC initialization
XScuGic_SetPriorityTriggerType set the interrupt priority and interrupt trigger, the author here
Some doubt that the manual it says interrupt trigger mode can not be changed here why it has this function, we also need to look at
XScuGic_Connect set interrupt service routine entry address
XScuGic_Enable GIC allowed
XGpio_InterruptGlobalEnable GPIO global interrupt enable
XGpio_InterruptEnable corresponding GPIO interrupt enable
Xil_Excep TI onInit exception handler
Xil_ExcepTIonRegisterHandler
Xil_ExceptionEnable
Finally, write the interrupt service routine, the interrupt service routine, you need to disable interrupts enabled, complete service program before opening.
Overall, we Because the libraries SDK provides makes it very easy to use simple Zynq interrupt, and interrupt source a lot, plus the PS part of the PL part with, very flexible to use.