1. Fault handling program block diagram
The fault handling program includes switching inspection of the protection soft pressure plate, protection setting comparison, protection logic judgment, trip processing program and post-acceleration part. The fault handling program block diagram is shown in Figure 2-8. The protection logic judgment procedure will be described in detail in Chapter 3.
Enter the fault handling program entrance, first set the flag KST to 1, and drive the starting relay to open for protection.
Usually microcomputer protection is always a complete set of protection devices with multiple functions, and a CPU sometimes has to handle multiple protection functions separately. For example, capacitor protection must handle protections such as rapid current interruption, undervoltage, overvoltage, and zero-sequence overcurrent. Therefore, logic programs for handling multiple protections must be arranged in the fault handling program. Obviously, different protection devices have different functions and different logics. The judgment and troubleshooting procedures will not be the same. But in terms of its principle, it is necessary to first check whether the protection "soft pressure plate" (that is, the switch value setting) is put in? Does its numerical setting exceed the limit? If the soft pressure plate is not put in, it will go to the processing program of other protection functions; if the soft pressure plate of this protection has been put in and exceeds the set value, it will enter the logic judgment program of the protection. If the logic judges the protection action, the protection action flag will be set first. "1", reports the protection action signal, and then enters the fault handling procedures of tripping, reclosing and post-acceleration. In each protection logic judgment, if the numerical setting value of phase A does not exceed the set value or the logic judgment program does not judge the protection action, the logic judgment and fault handling program of phase B and phase C will be entered.
2. Trip and post-acceleration logic program block diagram
The logic processing program block diagram of tripping and post-acceleration is shown in Figure 2-9.
(1) Trip logic program
When entering the trip logic program, a three-phase trip command is issued immediately. The trip command is output via a port of the CPU parallel interface. Then execute the delay 0.48 instruction. The 0.4S time is the tripping and reclosing time, which is realized through the CPU internal timer delay, and the program is only used to query whether the 0.4S delay time has expired. If the 0.4s time has not arrived, a 40ms delay will be executed. At this time, 40ms is the time for the circuit breaker to trip. It is implemented through program loop delay and software. After 40ms, the program checks whether the trip command has been withdrawn. If not, it checks whether there is no current in the three phases at this time. The criterion is to compare the current sampling value with the "no current check setting value". If no current indicates that it has tripped, the trip command will be withdrawn and the program will return to query whether the 0.4S delay time has expired. If there is still current in the three phases, it means that the circuit breaker has not tripped after the trip command is issued. If it still has not tripped after a delay of 0.258, it means that the circuit breaker may be faulty, and then send another re-trip (ZT) command. . If it still does not trip after 5s loop delay, it will alarm. If the circuit breaker is successfully tripped within 5 seconds, it will return to 0.48 delay detection after retracting the trip command.
(2) Post-acceleration logic program block diagram
After a delay of 0.48 after issuing the tripping order, the reclosing action should be completed under normal circumstances. Therefore, the next step of the program is to detect whether the reclosing is successful, that is, to detect the contact of the closing position relay KCP. The program first checks KCP=1? If KCP=0, it means that the circuit breaker has not reclosed. If it continues to wait for 12 seconds and the circuit breaker has not reclosed, it will return to the main program. If KCP=1 and within 3s of post-acceleration memory, wait 10ms before entering the post-acceleration program.
After entering the post-acceleration program, the current sampling values are used to recalculate the amplitude and phase of each phase current and voltage. If the post-acceleration stage II soft pressure plate has been put in and there is still a fault within the range of stage II, a re-jump (ZT) command will be issued immediately and the flag bit ZT = 1 will be set (that is, there will be no coincidence flag after re-jumping). If the accelerating pressure plate after the second stage is not put in or there is no fault in the five-stage range, it is further inquired whether the soft pressure plate of the acceleration stage III is put in and whether there is a fault in the five-stage range. If there are no faults within the range of section III, the reclosing is successful, the fault handling program ends, and returns to the main program loop. If there is a fault in the range of section III, send a re-trip command, set ZT=1, and then transfer to the trip processing program part. After the re-jump, after detecting ZT-l, the program ends the fault handling program and returns to the main program loop.
3. The relationship between the interrupt service program and the main program backup basic module
The relationship between the sampling interrupt service program and the main program and protection logic, tripping and post-acceleration processing program is shown in Figure 2-10.
There are four timers in the protection CPU chip. The timing time can be determined by initialization. For example, if the timing is 1.666ms, apply for an interrupt once. This is the timed sampling interrupt method. After the interrupt is responded to, it is transferred to the sampling interrupt service routine. During normal operation, after the sampling interrupt service routine ends, it automatically returns to the execution of the originally interrupted instruction in the main program. However, if a fault is found in the protected line or equipment after the sampling calculation, the protection will be started, and the interrupt return address will be modified immediately, forcing the interrupt service program to enter the fault handling program after the end, instead of returning to the original interrupted main program. go.
When executing the fault handling program, you still have to enter the sampling interrupt service program regularly, but because the start flag KST=l at this time, the interrupt return address will no longer be modified after the interrupt ends (see Figure 2-6 for details). After the interruption ends, it automatically returns to the original interrupted fault handling program. Even when executing the post-trip acceleration program, the interrupt service routine must be entered regularly. This allows the protection to obtain real-time sampling data at any time, ensuring the real-time nature of the protection and the correctness of the actions. This is where microcomputer protection is superior to conventional protection.
After entering the fault handling program, the protection logic judgment (including oscillation blocking) is first made. If the protection logic judges that a trip should occur, the post-trip acceleration processing program is entered. After the processing is completed, the program returns to the self-test loop part of the main program. If the protection logic determines that there should be no action, it will also return to the self-test loop part of the main program.