Table of contents
Convert an existing model to an architecture model (Architecture Model)
Architectural Model Generation Code Steps
foreword
I have already introduced how to build the AUTOSAR architecture model, refer to the following:
Then why is there an architecture model? In addition to the AUTOSAR architecture model in System Composer, there is also a model without AUTOSAR architecture as shown below:
What are the benefits of model architecture? Program modeling, convenient for multi-person collaboration, etc. Of course, there is no such a large-scale project. Since the models of three-phase PFC and single-phase PFC will be integrated in the front, this involves the execution cycle of the two PFCs. Modeling the architecture model, the generated code will have a certain coupling, there may be other ways to solve it, such as changing the configuration or directly manually adjusting the generated code, but the method used here is to build an architecture model and configure each module. Period, the generated code is independent and can be verified by model simulation, which is quite convenient.
Convert an existing model to an architecture model (Architecture Model)
The following is a three-phase PFC and single-phase PFC compatible simulation model that has been built. The generated code is the middle piece, including their respective state machines and control algorithms.
Step 1: Create a new architecture model, as follows
Step 2: Get a blank Component, design and create the corresponding Component according to the system requirements
As follows, decompose the system according to the needs to obtain the judgment of PFC mode, the main control model and signal output model of single-phase and three-phase PFC, and the three-phase and single-phase PFC also include voltage loop, current loop, state machine, etc.
Step 3: Decompose the original model to obtain PFC pattern recognition. Here, according to the needs of the system, it is divided according to the execution cycle. Taking PFC_Mode as an example, recreate a sub-model and split the original model into sub-models. This step is similar to AUTOSAR The operation of the architecture model is similar, you need to set the configuration of the generated code, the execution speed of the module, etc.
Step 4: Call the sub-model, right-click Link to Mode as follows
After completion, the effect is as follows:
Step 5: After repeating the above steps, the input signal is directly connected to the left edge of the Component, and the output signal is connected to the right edge of the Component
The final product is as follows, the model of the generated code part has completed the conversion of the entire architecture model
Step 6: Call the architecture model, copy the original model, add the Model module to call the Component module for simulation verification, as follows:
Step 7: Replace the core algorithm module in the original model and perform system simulation. Errors of various connection data types will be reported at the beginning, just follow the prompts to adjust
Step 8: Simulation Verification
Three-phase PFC works normally
Single-phase PFC works fine
Architectural Model Generation Code Steps
The operation of generating code after structuring the model is similar to the operation of generating code for the normal model. Here we take 2020b as an example
Step 1: Open the main Component model, find APPS and find Eembeded Coder
Step 2: For the first generation of code, it is best to click Quick Start and follow the prompts to complete the steps. When the configuration and model are correct, the next time the code is generated, just click Build.
Select Multitasking rate monotonic here
The effect of generated code is as follows, View Code can see the generated code corresponding to the model
As you can see from the generated code, step2 includes all functions that run once in 1ms, such as PFC mode, state machine, etc.
Summarize
The above is the operation demonstration of generating code through System Composer architecture. In practice, there are more application details of System Composer that can be studied slowly.