ESP32 C2 AT firmware use
ESP32 C2 module, as shown in Figure 1-1
Figure 1-1 ESP32 C2 module
ESP32 C2 development board, as shown in Figure 1-2
Figure 1-2 ESP32 C2 development
Program Highlights
1. Complete WiFi subsystem, conforming to IEEE 802.11b/g/n protocol, with Station mode, SoftAP mode, SoftAP +Station mode and promiscuous mode (that is, Promiscuous mode, which is a special mode) 2. Low-
power Bluetooth subsystem , support Bluetooth 5, support central device role (Central) and peripheral device role (Peripheral)
3, industry-leading low power consumption performance and radio frequency performance
4, RISC V 32-bit single-core processor, four-stage pipeline architecture, main frequency up to 120 MHz
5. Storage function, built-in 272 KB S RAM (of which 16 KB is dedicated to cache), 576 KB ROM storage space
Security mechanism
1. Support off-chip memory encryption and decryption function
2. Integrated random number generator
3. Hardware encryption accelerator supports ECC, Hash and secure boot
Abundant communication interfaces and GPIO pins can support various scenarios and complex applications
2. Product Features
1.2.1、WiFi
1. Support IEEE 802.11 b/g/n protocol
2. Support 20 MHz bandwidth in 2.4 GHz frequency band
3. Support 1T1R mode, data rate up to 72.2 Mbps
4. Wireless multimedia (WMM)
5. Frame aggregation (TX/RX A- MPDU, TX/RX A-MSDU)
6. Immediate block acknowledgment (Immedia te Block ACK)
7. Fragmentation and defragmentation (Fragmentation and defragmentation)
8. Transmission opportunity (Transmit opportunity, TXOP)
9. Beacon automatic monitoring (hardware TSF)
10. 3 × virtual Wi-Fi interfaces
12. Support infrastructure network (Infrastructure BSS) Station mode, SoftAP mode, Station + SoftAP mode and mixed mode. Please note that when the ESP8684 series scans in Station mode, the SoftAP channel will change at the same time
13. Antenna diversity
14. Support external power amplifier
1.2.2, Bluetooth
1. Bluetooth LE: Bluetooth 5
2. High power mode (20 dBm)
3. Rate support 125 kbps, 500 kbps, 1 Mbps, 2
4, Mbps
5, broadcast extensions ( Ad ver ti sing Extensions)
6. Multiple Advertisement Sets
7. Channel Selection Algorithm #2
8. Wi-Fi and Bluetooth coexist and share the same antenna
1.2.3, CPU and storage
1. 32-bit RISC-V single-core processor with a main frequency of up to 120 MHz
2. CoreMark® scores:
– Single-core 120 MHz: 305.42 CoreMark; 2.55CoreMark/MHz
– SHA accelerator (FIPS PUB 180-4)
3. 576 KB ROM
4, 272 KB SRAM (16 KB is dedicated to cache)
5, SiP flash
6, flash controller introducing cache mechanism
7, support flash in-circuit programming (ICP)
1.2.4, advanced peripheral interface and sensor
1. 14 × GPIO ports
2. Digital interface:
3 × SPI 2
× UART
1 × I2C host
LED PWM controller, up to 6 channels
General DMA controller (GDMA for short), 1 receiving channel and 1 sending channel
Analog interface:
1 × 12-bit SAR A/D converter, up to 5 channels
1 × Temperature sensor
Timer :
1 × 54-bit general-purpose timer
2 × Watchdog timer
1 × 52-bit system timer
1.2.5. Low power consumption management
Power management unit, four power consumption modes
1.2.6. Security mechanism
1. Secure Boot
2. Flash Encryption
3. 1024-bit OTP, 256-bit
Encryption Hardware Accelerator:
1. ECC
2. Random Number Generator (RNG)
hardware connection
ESP32C2 hardware connection pin assignment
| Function | ESP32C2-2MB development board pins | Other device pins |
| Download firmware 1 | UART0 • GPIO19 (RX) • GPIO20 (TX) |
PC • TX • RX |
| AT command/response 2 | UART1 • GPIO6 (RX) • GPIO7 (TX) • GPIO19 (CTS) • GPIO20 (RTS) |
USB to UART serial module • TX • RX • RTS • CTS |
| output log | UART0 • GPIO8 (TX) |
USB to UART serial module • RX |
Note 1: The pin connection between the ESP32C2 development board and the PC has been built in the ESP32C2 development board, you only need to use the USB data cable to connect the development board and the PC.
Note 2: CTS/RTS pins need to be connected only when hardware flow control function is used.
The minimum wiring diagram of the module is as follows
3. Burn AT firmware
Open the flash download tool, select ESP32-C2 as ChipType, as shown in Figure 3-1
Figure 3-1 ChipType selection ESP32-C2
Select the factory_ESP32C2-2MB.bin firmware path, fill in the address with 0x0, then select the COM port, click the START port to start burning, as shown in Figure 3-2
Figure 3-2 Burning configuration
4. Check whether the AT firmware is burned successfully
Open any serial port tool;
• Serial port: select the serial port used to send or receive "AT command/response" (see hardware connection for details);
• Baud rate: 115200;
• Data bits: 8;
• check digit: None;
• stop bit: 1;
• flow control: None;
• Input "AT+GMR" command, check Send new line;
As shown in Figure 4-1, if the response is OK, it means that the AT firmware is burned successfully.
Figure 4-1 AT programming successful
5. AT command set
• AT: Test AT startup
• AT+ RS T: restart the module
• AT+GMR: View version information
• AT+CMD: Query all commands and command types supported by the current firmware
• AT+GSLP: Enter Deep-sleep mode
• ATE: enable or disable AT echo function
• AT+RESTORE: restore factory settings
• AT+UART_CUR: set UART current temporary configuration, not save to flash
• AT+UART_DEF: set UART default configuration, save to flash
• AT+SLEEP: set sleep mode
• AT+SYSRAM: query the current remaining heap space and minimum heap space
• AT+SYSMSG: query/set system prompt information
• AT+SYSFLASH: query or read and write flash user partition
• AT+FS: file system operation
• AT+FSMOUNT: mount/unmount file system
• AT+ RF POWER: query/set RF TX Power
• AT+SYSROLLBACK: Roll back to previous firmware
• AT+SYSTIMESTAMP: query/set local time stamp
• AT+SYSLOG: enable or disable AT error code prompt
• AT+SLEEPWKCFG: Set Light-sleep wake-up source and wake-up GPIO
• AT+SYSSTORE: set parameter storage mode
• AT+SYSREG: read and write registers
For more AT command examples, see AT Command Examples - ESP32-C2 - — ESP-AT User Guide release-v3.0.0.0 document