Vivado design and implementation reports an error The design is empty solution (pro-test is effective)

[Place 30-494] The design is empty

When using Vivado for design and implementation, click Run Implementation, and the error The design is empty is reported during the running process, as shown in the figure:

Error reason

Because the design has only inputs, the synthesis tool can be optimized to nothing. In other words, if there is no output, no logic is needed, the synthesis tool only needs to keep the logic needed to produce the output

As shown in the figure, it can be seen in the schematic that there are only two inputs and no output:

It can be clearly seen in the program that there are two inputs without any output:

solution

You only need to give any output to solve the error perfectly:

I hope this article is helpful to everyone. If there is anything wrong with the above, please correct me.

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