This article is about the problems that I feel that I need to understand and remember in the process of learning the principles of computer composition . There are also some questions and answers that I have generated during the learning process. This article may have poor typesetting and limited energy. Please forgive me
Chapter One:
(1) The number of bits in MAR corresponds to the number of storage units, why is that?
because:
The memory bank is composed of multiple storage units, and the storage unit is composed of multiple storage elements ("+1" is a storage unit of + during address addressing, such as (+1 in the program counter pc)) and MAR is the address register.
If MAR is 10 bits, there is a storage unit
(2) The number of address buses is related to the number of memory units, which is the same as the number of MAR bits
(3) The data bus has the same length as the storage word, and the same number of bits as the MDR
(4) MDR is a data register, which stores data in a storage unit, so the number of bits is the same as the number of storage elements (bits) in the storage unit
(5) The number of bits in the pc is related to the capacity of the main memory
Because the main memory capacity = the number of storage units * storage word length
(6) When in storage, k, m, g are powers of 2
In speed and frequency, it is a power of 10 (and k (small k) in this scenario)
Chapter two:
(1) The number of machines stored in the machine
Integer original code:
Pure decimal original code:
(2) The original code of 0 has two representations (+0, -0)
(3) When the machine word length is n bits, the smallest negative integer that can be represented by complement code
because:
In n-bit two's complement notation, the most significant bit is the sign bit, with 0 for positive numbers and 1 for negative numbers. Thus, in n-bit notation, for signed integers, the smallest negative number is to set the sign bit to 1 and the other bits to 0, which is 100...00100...00, which is
(Personally understand that the maximum value of a positive number is -1, and the range of a negative number is 1 greater than a positive number, so the minimum number of a complex number is
and the complement is the same as the original code of its absolute value, because the complement 0 has only one representation)
(4) Why is the complement of -8 1000
The complement of -8 is 1000, because in computers, negative numbers are usually represented using the complement.
First, we need to understand the definition of two's complement. The complement code of a positive integer is the same as its original binary code, and the complement code of a negative integer is to invert the complement code of its corresponding positive integer and add 1.
For the negative integer -8, the binary original code of its absolute value is 1000, where the highest bit 1 represents the sign (0 represents a positive number, 1 represents a negative number). Now that the complement of -8 is required, we need to invert the original binary code of its absolute value first 0111, and then add 1 to get it 1000, which is the complement of -8.
Therefore, the complement of -8 is 1000.
(5) The frame shift is an operation on the true value. Adding an offset to the true value is the machine word length (n+1)
Shift operation:
Four flags for addition and subtraction:
OF : Why does the carry of the highest bit XOR the carry of the second highest bit indicate overflow?
There are only two cases of overflow (only valid for signed numbers)
(1) Positive number + positive number = number whose sign bit is 1
(2) Negative number + negative number = number whose sign bit is 0
Case (1): When a positive number is added to a positive number, the highest bit of both numbers is 0, and the highest bit carry is 0. If the second highest bit carry is 1, the result is 1 (negative number), and overflow occurs. At this time, the XOR result is 1
Case (2): When adding two negative numbers, the highest bit of both numbers is 1, and the carry of the highest bit must be 1. If the carry of the second highest bit is 0, the final result is 0 (positive number), overflow occurs, and the XOR result is 1]
SF : Judgment of the sign of the signed number, meaningless to the unsigned number
SF: 0 positive number
SF: 1 Negative
ZF : Indicates whether the result is 0
ZF: 1 results in 0
ZF: 0 result is not 0
CF : Indicates whether carry or borrow occurs during addition and subtraction of unsigned numbers (addition is carry, subtraction is borrow) .
CF=carry generated by the highest bit XOR sub (addition and subtraction controller)
CF: 1 means carry or borrow
CF: 0 means no carry or borrow occurs
The processing of the last remainder of the original code addition and subtraction alternate method:
When starting to learn the original code, I learned the method of addition and subtraction, and finally had doubts.
That's what happens with the final remainder. What exactly does its symbol have to do with it?
Later, it was found that the addition and subtraction of the original code was processed separately by the value bit and the sign bit, then in the process of numerical calculation, the sign bit of the quotient and the remainder must be 0, and finally determine the sign of the quotient and the remainder according to the signs of the divisor and the dividend. (If the final remainder is negative, the quotient needs to be 0 and the complement of [|y|] is not required for the last shift (why is it said that the last digit of i does not need to be shifted? Because the idea of the method of not restoring the remainder is to directly perform the next operation with 2*a+b, and the final result does not need to be shifted)
In the final result, the remainder has the same sign as the dividend
n-digit value, it is possible to add or subtract n+1 times or n+2 times and shift n times
Summary of complement addition and subtraction alternate method:
The addition and subtraction alternate method of complement code is operated with signed bit, and the final quotient and remainder are also complement code
The execution of addition or subtraction is judged according to the signs of the divisor and the dividend :
the same sign performs the subtraction operation, and the different sign performs the addition operation
Determine whether the quotient is 1 or 0 by the signs of the remainder and the divisor :
Same sign : quotient 1, shift left to subtract divisor
Different sign : quotient 0, left shift plus divisor
The end of the quotient must be quotient 1 without correction
Comparison of the original code addition and subtraction method and the complement code addition and subtraction method:
Introduce double sign bit when judging whether the value overflows
01: Indicates positive overflow: when two positive numbers are added, the result exceeds the maximum positive range
10: Indicates negative overflow: when two negative numbers are added, the result exceeds the minimum negative range
Representation and calculation of floating point numbers:
Normalization of floating point numbers:
Left normalization: when the highest value bit of the mantissa is not a valid bit, the left rule is used to eliminate 0 (the corresponding order code is subtracted by one), and the left rule can be performed multiple times
Right normalization: When the effective digit of the mantissa enters before the decimal point, the mantissa is right normalized (shifted one bit to the right), only once
In the normalization process, the IEEE754 standard is commonly used.
The frame shift is used in the IEEE754 standard. Do you have any questions about the offset value in the frame shift?
The offset value defines the position of the positive zero point in the frame shift. The offset value is a fixed integer used to represent the zero point in the frame shift. The commonly used offset value is
eg:
In a one-byte (5bit) frame-shift representation, the offset value is 127. This means that a frameshift representing a value of 0 would be 01111111 (i.e. 2^7 - 1), while a frameshift representing a positive integer would go from 10000000 to 11111111, and a negative integer would go from 00000000 to 01111111.
Machine word length : the number of bits of binary data that can be processed by the CPU for an integer operation (usually directly related to the ALU)
Storage word length : the number of bits of binary code in a storage unit (usually the same as the number of MDR bits)
That is, the number of bits in the storage word length represents the upper and lower limits of data that a storage unit can represent
10000---
The difference between M and MB
1m words represent 1,000,000 words
1mb means 2 to the 20th power of B
Storage System:
Cache hit ratio problem:
The data in the cache (cache memory) is a subset of the main memory. When the CPU accesses the memory, it will first access the cache. If the cache does not find the required data, it will go to the main memory to find it. Therefore, the cache hit rate is introduced to describe the proportion of access completed in the cache. We hope that all data can be found directly in the cache, so the closer the hit rate is to 1, the better.
Nc: The number of cache hits during the hit process
Nm: The number of main memory accesses completed during the hit process
h: Indicates the hit rate
ta: indicates the average access time
tc: Indicates the time spent on the hit
tm: Indicates the time spent in main memory access
Calculate the number of address lines and data lines:
Storage capacity: Storage capacity is the total number of bits that can store binary codes in the main memory , that is , storage capacity = number of storage units × storage word length (the number of bits in each storage unit) , and can also be expressed by the total number of bytes: Storage capacity = number of storage units * storage word length/8
Address line: the number of storage units = 2^ the number of address lines ( the address line is used to transmit address information
Data line: The data line determines the storage word length, the number of data lines = the number of digits in the word length. ( equivalent to the maximum number of bits that can be transferred in one calculation (the number of bits in a computer) )
eg:
The word length of a computer is 32 bits, and its storage capacity is 16M×32 bits. What is the sum of its address lines and data lines?
First convert the unit to Byte
16m=16*1 024 (2 to the 10th power)=16777216 (B)
32bit=4Byte
Data capacity=16777216*4=67108864 (64M B=2 to the 26th power)
Therefore: 32 data lines and 26 address lines (because it is equivalent to requiring 26 bits to connect to an address line)
A complete refresh process of DRAM takes several storage cycles
A complete refresh process of DRAM usually takes one memory cycle. Specifically, DRAM needs to cycle refresh between its memory cells and check the charge state of each memory cell to make sure they don't leak electricity. This refresh cycle is usually measured in milliseconds, but it is usually broken into many small operations, each requiring a store cycle to complete. Therefore, it can be said that a complete refresh process of DRAM needs to occupy one storage cycle.
In the 408 exam, the cross addressing method is the low cross
The computer instruction address is not a physical address (memory address) but a logical address (external storage address). When executing an instruction, the logical address in the instruction is converted into the physical address of the main memory by hardware.
Command system:
Assembly conditional branch:
Why will the data stored in the temporary register be destroyed if it is stored in the general-purpose register?
The data stored in the scratch register is for temporary storage for subsequent operations. A general-purpose register is a storage device in the CPU that stores data that needs to be used or modified during instruction execution. Due to the limited space of general-purpose registers, multiple data cannot be stored at the same time, so the data in the registers must be cleared between different operations. If a modification is made directly on data stored in a general-purpose register without saving the original data, the original data will be destroyed.
In addition, the design purposes of scratch registers and general registers are also different. Scratch registers are usually used to buffer input/output data, assist the CPU to process data, etc. Their capacity is larger than that of general-purpose registers, but their speed is slower. The general-purpose register is specially used for data storage when the CPU executes instructions, and its capacity is generally smaller than that of the scratch register, but its speed is faster. Therefore, in order to ensure the correctness and efficiency of CPU instructions, scratch registers and general-purpose registers play different roles and play roles in different scenarios.
The machine cycle is usually determined by the access cycle
The instruction word length is generally an integer multiple of the storage word length