In the past week, I have been working on the power consumption of pic microcontrollers. Since the project is powered by batteries, the issue of power consumption is very important. According to the data sheet and the information on the Internet, the power consumption of the microcontroller is mainly affected by the following factors:
1: All I/O pins remain high-impedance input high level or low level
2: Turn off the comparator and CVref (programmable upper reference voltage), WTD, T1OSC, BOR (brown-out reset), etc.
3: PORTB on-chip weak pull-up
4: Close all unused modules and open them when they are used
5: MCLR pin must be at logic high level
The PIC microcontroller enters the sleep power-saving mode after executing the SLEEP instruction. After entering SLEEP mode, the main oscillator stops. If the watchdog timer is enabled during programming, the watchdog timer will be cleared and keep running. I/O ports, peripheral modules and internal RAM will maintain the original state, so if low power consumption is required after sleep, IO ports should be set to high-impedance input state before entering SLEEP, and unused modules should also be turned off. Other peripheral modules related to the main clock, such as USART in asynchronous mode, will not work.
There are many conditions to wake up SLEEP, such as IO port level change, AD conversion end, external reset, watchdog overflow, etc. For details, please refer to the data sheet.
When the SLEEP instruction is executed, the instruction of PC+1 is prefetched. When the device is woken up by an interrupt condition (this interrupt should be enabled), if GIE (global interrupt enable bit) is 0, the device will Continue to execute the instructions below the SLEEP instruction. If GIE is 1, the device will jump to the interrupt entry at 0004H after executing the prefetched PC+1 instruction. Therefore, it is recommended that an instruction immediately following SLEEP should preferably be a NOP.
External manual reset of MCLR will wake up the device and RESET, and the meaning of the flag bit indicating the state is detailed in the data sheet.
When the watchdog timer overflows under SLEEP, it will wake up the device, and then execute the instructions under SLEEP, and there is also a flag bit to indicate the status.
After entering SLEEP, the main oscillation stops, and the modules related to the main oscillation will stop working, A/D and liquid crystal drive. Modules such as the watchdog should be closed before the SLEEP instruction is executed. This way the power consumption will be the lowest.
About the IO port. In the DATA SHEET of 16C926, I still mentioned some. All I/O ports are connected to VDD or VSS , and cannot be suspended . Before entering SLEEP, all I/Os should be set as input ports and connected to pull-up or pull-down.
If the PORTB port has an internal pull-up function, you should choose not to pull it up.
This project took nearly a week to find the problem because the BOR was not turned off and the current reached 50UA during sleep.
The following is the test data of a netizen:
Test conditions: PIC16F676 uses internal 4MHz RC oscillator, power supply voltage is 5V, and the current consumption of the microcontroller under sleep is tested.When the external IO port is set as input and has a fixed level, the program enters an infinite loop of NOP instructions and jump instructions. Power consumption is about 1.26mA
1. After SLEEP: WDT is turned on and divided by 256, wake up every 2.3 seconds or so, all IO ports are digital input ports, directly connected to high level or low level. 5V, 0.159mA, the main configuration: _INTRC_OSC_NOCLKOUT & _WDT_ON & _PWRTE_ON & _MCLRE_OFF & _BODEN
2. The above program does not move, just configuration & _BODEN_OFF, the current drops to 8.5μA, other configuration changes have little effect on current consumption, WDT on or off The difference is only 0.1μA, it can be seen that the BROWN OUT DOWN function is a big power consumer.
3. The above configuration and program are not moved, all IO input ports are suspended, and the result is that the current becomes 0.8-1mA, and the level change interrupt is not turned on above, and the current becomes larger when the hand is close to the single-chip microcomputer. It can be seen that although the IO port does not seem to absorb current, the current that the interference level causes the comparator in the microcontroller to flip frequently can be said to be amazing.
4. In the above configuration, only the WDT frequency division ratio is changed to 1:1, and each IO port is still connected to a fixed level. At this time, the single-chip WDT wakes up about every 1.8mS, and the current is 8.8μA. It can be seen that the wake-up of RC is very power-saving.
5. The above configuration, WDT1: 256 frequency division, set all IO ports as output, and output low level, IO port is not connected to any load, the resulting current is 9.5μA, which is 1μA more than the input. It can be seen that the drive of the IO port also requires energy.
6.以上配置，WDT1:256，各AD输入口设置成AD输入，其它设置成IO输入，均接固定电平，ADON置1,GO为零，此时AD模块开启，转换未开始，转换时钟采用系统时钟的1/8,电流8.8μA基本无变化，转换时钟采用AD独立RC振荡，电流仍为8.8μA,独立RC振荡，GO置1,转换完成后继续AD转换，电流为9.2μA,期间没有空余采样电容的充电时间，可见AD转换并不怎么耗电。
7.关闭AD,开启RA口的弱上拉，有弱上拉的IO悬空，WDT 1:1，电流8.8μA，将弱上拉的IO口其中一脚接地，电流猛增至212.4μA，换算下来一个弱上拉相当于一个24KΩ左右的电阻。
综上所述，耗电大户有两个：第一大户是 悬空的输入脚 ，第二大户为 弱上拉时IO口接地 。第三大户为 BROWN OUT DOWN RESET（电压过低复位）。 若要省电的话不妨以此参考。此次试验是单片机没有任何外围电路的情况下测得，当然外围电路比较复杂，设计省电模式其它电路的耗电也要考虑。若要非常省电，那么每个功能是否开启都是锱珠必较的。