【Transfer】HDMI introduction and process

HDMI introduction and process

HDMI, full name (High Definition Multimedia Interface) high-definition multimedia interface, mainly used to transmit high-definition audio and video signals.

HDMI pin

HDMI has five pin types: A, B, C, D, and E. Currently, Type A is more common in the market:

in

• 1-9 are the pins actually used for TMDS data transmission, divided into three groups of 0, 1, and 2
• 10-12 is the TMDS clock signal, if the current Video Timing is 480p@60Hz (Htotal: 800, Vtotal: 525), then TMDS clock = 800x525x60 = 25.2MHz. The TMDS clock is like packaging pixels. One clock transmits the R, G, and B (8bit) signals of one pixel on three channels respectively.
• 13 CEC (consumer electronic control) is similar to an extended HDMI function for manufacturers to customize HDMI messages (for example, if you have a Sony DVD and TV, connect them with an HDMI cable, if you use the remote control of the TV DVD can be controlled, and DVD performs a certain function, then the command signal of this function is transmitted through the CEC pin between TV and DVD)
• 14 is a reserved pin, not used (or one more pin can be provided for CEC)
• 15-16 are I2C pins, used for DDC (Display Data Channel, mainly used for EDID and HDCP transmission) transmission, you can check the details. In the process of HDMI, DDC communication is almost done first (there was Hotplug before) , because the master and slave devices of HDMI need to obtain the EDID of their counterpart device through DDC , so as to obtain various information, and compare timming with Confirm that the timming sent out later is the most suitable
• 17 is the ground pin
• 18 AC pins for 5v
• 19 is the Hotplug (hot plug) pin (used to monitor whether the HDMI device exists, if it exists (Hotplug is high), then you can read the EDID through DDC), HDMI has regulations that the source device can read the receiver when the HDMI 5vAC is powered off The EDID of the device , that is, the Hotplug needs to be High . There are two Hotplug-related situations that cause HDMI to be recognized as DVI:
  • If the Hotplug is High, but the EDID is not ready, then the signal source device will think that the receiving device is DVI because it cannot read the EDID, which will cause HDMI to have a problem of image and sound.
  • If the Hotplug is set to Low, the signal source will not be able to read the EDID and think that the receiving device is DVI, which will cause HDMI to have pictures but no sound.
  • In the case of TV with multiple HDMI channels, sometimes multiple HDMI channels are switched. After switching, the HDMI channel should be initialized first, that is, the Hotplug should be pulled down first to notify the HDMI source device that the EDID used before has changed. Re-read, then the source device will read the new EDID when the Hotplug is pulled high , but the process of pulling it down will take at least 100ms, otherwise the source device may not read the new EDID, thus outputting the DVI signal

  DVI（24+1）支持视频信号，不支持音频输出。常见于电脑、显示器等设备上，是比较老的接口了，适用于输出设备连接显示设备，DVI最高可以支持2K。
  

transfer process

There are three types of data transmitted by HDMI TMDS (plus Hsync and Vsync, 4 types):

• Preamble (control information), mainly used to control whether the next transmitted data is Data Island or Video Data
• Data Island (data package), various types of package information, including audio data packages, image information packages, etc.
• Video Data (video information), video pixel data, HDMI can transmit pixel data in both RGB and YUV formats
• There are also Hsync and Vsync

HDMI data transmission has three channels TMDS0, TMDS1, and TMDS2, and the transmission process of each channel is the same:

If the 8-bit data enters the TMDS encoder, a 10-bit TMDS signal with strong anti-interference is obtained , and then serialized and output; after receiving the serial HDMI signal at the receiving end, the signal is restored to obtain a 10-bit TMDS signal, Finally, the original 8bit data is obtained by decoding with a TMDS decoder.

The overall transfer process is as follows:

• If the transmission is Video Data, and the format is RGB, then all 24bit inputs of the three channels will be occupied , Channel0[7:0] is used to transmit B, Channel1[7:0] is used to transmit G, and Channel2[7:0] ] is used to transmit R.
• If the transmission is Data Island, it occupies three channels with a total of 10bit input , Channel0[3:2] is used to transmit Data Island Header (packet header), Channel1[0:3] and Channel2[0:3] are used to transmit Data Island Content (data in the package).
• If the transmission is Preamble, it occupies two channels 1 and 2 with a total of 4bit input . Channel1[1:0] and Channel2[1:0] are CTL0, CTL1, CTL2, and CTL3 respectively, which are used to determine whether the next input is Video Data or Data Island

VSYNC: vertical synchronization，指与显示器的帧数同步。 简单来说就是启用了VSYNC的渲染过程，帧数不会超过显示器的帧数，一个同步会被执行。 同步的地方就是显示器扫描线结束最后一行扫描，并且准备开始第一行扫描的地方。

HSYNC: horizonal synchronization，相比于VSYNC来说，同步的单位从帧降到行，即是保证操作不是在扫描一行的中间出现，而是同步到下一行。

VBLANK: 显示器扫描线完成最后一行后，需要重返左上角。这个过程叫做: vblank，也叫VBI(vertical blank interval) ，因为扫描线变得blank，以防止看到一个斜线显示在屏幕上

VSYNC与HSYNC频率与什么有关系

HSYNC＝VSYNC×总共的扫描行数

For Hsync and VSync, two bit inputs of Channel0 will be occupied, Channel0[0] is Hsync, and Channel0[1] is Vsync

transmission cycle

HDMI's TMDS data transmission can be divided into three transmission cycles:

• Hsync, Vsync are transmitted during the Control Period, and Preamble is transmitted at the end of the period
• Data Island (data packets) will be transmitted during the Data Island Period, and there will also be Hsync and Vsync
• Video Data (video pixel data) is transmitted during the Video Data Period

The overall period of a frame is as follows:

The transition of the three transmission cycles is as follows:

• On the left is Control Period, the transmission has Hsync, Vsync and Preamble
• In the middle is the Data Island Period, which transmits Hsync, Vsync, and two Packet Headers and Packets (one packet every 32 clocks); in addition, the two ends of the Data Island will use Guard Band to protect and separate the data of the Data Island , because this stage Most of the transmitted data is very important, such as the image resolution, which determines the display method of the subsequent Video Data data
• On the right is Video Data Island, which transmits video pixel data, and also has Guard Band at the beginning of the period

Data Island Packet structure

All Data Island Packets take 32 clock pulses as a cycle, that is to say, a packet is transmitted every 32 clk.

Take the above picture as an example,

• The packet header is BCH block 4, which is transmitted by Channel0[2]. 32clk means 32bit, and it is 4byte. The first three bytes are the packet header, and the last byte is the check code.
• The package body is BCH block 0, 1, 2, 3, which are transmitted by 8 wires in Channel1 and Channel2 respectively, with a total of 24byte and 6byte check codes
• The Parity Bits check code is used to check whether an error occurs during HDMI Cable transmission. If the Packet is checked incorrectly at the HDMI receiving end, if there is only one bit error, it can be corrected. Errors exceeding 1 bit will be judged as invalid. Packet (because HDMI is sending data all the time, it is impossible to resend the wrong packet?)
  So, at the receiving end, after unpacking, it is necessary to take out the Parity bit of each BCH block and perform Calibration (verification)

There are various types of Packet, please refer to HDMI Spec for details

Audio Clock

The sampling rate of Audio is 44100, 48000, 192000, etc., which are various. During HDMI transmission, Audio is PCM-level (uncompressed) transmission, and the PCM data is scattered into each package , in order to get each audio frame. Data also needs to know the sampling rate of Audio . HDMI specifies the transmission method of Audio:

The main parameters that Audio sampling rate fs reconstruction relies on are:

• TMDS Clock
• CTS
• N

On the sending device side, the known parameters include the sampling rate fs, the video clock Video Clock (TMDS clock), and the preset parameter N. Calculate CTS:

CTS=N∗fTMDS/128×fx

On the receiving device side, TMDS clock can be obtained through hardware devices, N, and CTS are transmitted through Audio Packet, find fs:

128∗fs=N×fTMDS/CTS

In order to maintain the stability and accuracy of fs at the receiving end, phase locking is required , that is, use VCO (Voltage-controlled oscillator voltage-controlled oscillator, the frequency generated by voltage control) to generate an appropriate frequency, and then use PFD (Phase Frequency Detector) to Frequency lock:

• First of all, since the VCO has an optimal working area such as (200MHz~500MHz), in order to ensure that the VCO is within the optimal operating frequency, we can push back from the back and first multiply the output fa128 to get fvco=fa128×
  S ×S2
  Since there are only a few types of fa128 (44.1k, 48k, etc.), it is relatively easy to get S and S2
• Then, in order to perform frequency matching faster, it is necessary to divide the recent frequency fx (that is, the crystal oscillator clock fcrystal) or fv (pixel clock), and also divide fvco to make the two trends equal. For subtle differences, D Code can be used to correct
  fvcoM=fxK
• Finally do PFD phase lock
• The feedback operations in steps 2 and 3 are carried out cyclically, and finally a relatively stable fvco can be obtained
• Finally get
  fa128=fvco/S×S2

HotPlug

HotPlug is hot-swappable. When the interface is connected, it can determine whether the device exists for follow-up work.

The HDMI source device (HDMI HPD) will monitor the Hotplug port of the sink device. If the Hotplug is High, it proves that the device can work, and then reads the DCC. If it is low, it proves that the device is disconnected.

The HDMI sink device should notify the source device that the EDID has been changed by pulling the Hotplug low , then the source device will re-read the new EDID after the Hotplug is pulled high, and the pull-down period should be more than 100ms.

HDMI stipulates that when the 5v pin of HDMI is powered on, the EDID can be read through DCC, that is, it is necessary to ensure that the Hotplug is high , and some Hotplugs are directly connected to 5V (see below).

Hotplug connection: (HDMI HPD (Hotplug detect?) detects the Hotplug end of the sink)

The 5V pin is used for power supply and the Hotplug is connected to it. This will ensure that the EDID can be read every time the source device is connected to the sink device. But this has a disadvantage. When the 5V power supply is disconnected, there will be 5V voltage recharged to the HDMI HPD and Hotplug, and the 5V voltage will impact the Hotplug. Once the Hotplug pin cannot withstand the 5V voltage recharge, it will be broken.

Here is a better Hotplug connection:

The above uses an extra GPIO pin plus a triode to control whether HDMI HPD is 0 or 1. If HDMI0_HPD_CTL outputs 0, then the triode is disconnected, and HDMI0_HPD detects High. If HDMI0_HPD_CTL outputs 1, then the triode is connected (conducted), HDMI0_HPD Low is detected.

HDMI Sink

For example, TV is the receiving end of HDMI, so what needs to be done at the HDMI receiving end.

HDMI can receive three channels of TMDS Data, TMDS Clock, Hotplug can be set, and I2C pins for DCC transmission. The above has already talked about TMDS Data, and setting the Hotplug, and then analyze the TMDS Clock.

TMDS Clock is Pixel Clock, that is, the clock frequency used by a pixel . The TMDS Clock is transmitted to the receiving end through the clk pin, but the receiving end does not know the frequency of the TMDS Clock sent by the sending end, so it needs to pass Phy (PHY is an analog-to-digital conversion part, unlike ADC, PHY does not know the sampling frequency Yes, you need to lock the frequency and phase by yourself, and detect the exact input frequency) to obtain the phase lock . However, because the HDMI bandwidth is too wide (480P@60Hz is 25.2MHz, 1080P@60Hz is 162MHz, and even up to 340MHz), the general VCO (voltage-controlled oscillator, the frequency generated by voltage control) cannot cover such a large range. , so the frequency band is required to set Phy:

First detect which frequency band the input frequency falls in, and then make different settings according to different frequency bands.

Use the crystal oscillator generated by the TV to count the count, and you will know the TDMS Clock after counting the count

fcrystal=count×fTMDS

Or use 1024 TMDS Clocks to count the number of crystal oscillators

1024×fTMDS=count×fcrystal

Since the video signal is changed from RGB 8bit to 10bit after TMDS encoding, and then serialized, the actual clock used to receive TMDS Data should be:

fReceiveClock=10×fTMDS

In addition, ReceiveClock can also be obtained by using TMDSClock as a reference and hardware phase locking instead of directly using the above multiplication.

After getting ReceiveClock, you can set the frequency PLL, and then sample the three channels to get TMDS Data.

Timming Detect

Timming Detect also needs to be performed on the Sink side, because if the device can support it (such as chroma), HDMI can freely change the Timming, and when the Timming is changed, the Sink needs to reset the Phy. Therefore, it is necessary to detect whether the Timing has been replaced by detecting the frequency change. Generally, there will be an interrupt service (or loop) thread to detect frequency changes. Once the frequency changes, the process will notify Phy to reset to ensure the correct operation of HDMI.

HDCP for HDMI copyright content protection

HDCP via DDC transmission

HDCP is mainly used for the protection of copyright video. For example, if there is a Blu-ray DVD player that can play blueray DVD, and the DVD has been authorized by HDCP, you now want to output the DVD image to a certain TV, but the TV does not have If the HDCP authorization is obtained, the TV may not be able to play images, or the playback quality may decline, such as snowflakes appearing, the image changes from 1080p to 480p, or there is no sound.

HDCP relies on the interaction of two devices for HDCP authorization authentication. The authentication process is as follows

• Transmitter will send a key An (64bit) and Aksv (key selection vector 40bit) to Receiver

• After Receiver receives An, it will also send a Bkvs and REPEATER (indicating whether the B device is a Repeater device) to the Transmitter

• Transmitter starts the HDCP authentication code algorithm:
  To understand the algorithm, we first need to know what ksv is used for

  • Inside each HDMI device, 40 groups of 64bit keys, key[40] will be saved
  • 40bit kvs, each bit is an index, when a bit n of kvs is 1, key[n] will be taken out,
  • Add all key[n] to get km,

• Receiver will also do HDCP authentication code algorithm to get km'

• Both Transmitter and Receiver will use km\km' to do hdcpBlkCipher, and get a value R0 and R0'

• After 100ms, the Receiver sends R0' to the Transmitter for comparison with R0, and if they are equal, the authentication is considered complete. Of course km = km' to ensure that R0 = R0'.

• 7-Every frame after that, Transmitter and Receiver will run hdcpBlockCipher once, but the parameters are Ks and M generated last time, and the new parameters generated are Ks, M, T

• 8- At frame 128, another R = T
• 9- After 2s between the first communication interval, re-authentication
• Subsequent steps 7, 8, and 9 are used for iterative authentication

In addition, HDMI also supports a faster and more frequent authentication method since 1.1, which is the lower half of the device communication diagram above

• In every 16th multiple frame, use T to do XOR with the 0 pixel of Channel0 of the current frame to get Pj
• After the 0 pixel of Channel0 reaches the sink, it also XORs with the T' of the sink to get P'j
• Sink sends P'j to Source, compares it with Pj, if it is the same, it passes the authentication

Knowing about HDCP is very helpful to deal with abnormal phenomena of HDMI. For example, if snowflakes appear from time to time, it may be that the signal is not good and the 0 pixel of Channel0 is wrong, so the second stage of authentication sometimes fails...

The overall process of HDMI Sink

• Extract and split 10bit TMDS serial data
• 10bit data, come in through different lines, determine which type it is: DE, Data Island, RGB, Hs, Vs, Ctrl
• TMDS decoding
• HDCP decoding, at the same time Hs, Vs, DE as delay
• RGB given DE, Hs, Vs...
• BCH decoded to get Packet, wrong verification
• Packet meaning analysis
• If it is information, store it in memory
• If it is Audio Data, generate the sampling frequency
• Audio output

Reposted from: https://www.cnblogs.com/TaigaCon/p/3840653.html