Foreword:
The TAUJ timer configuration of the RH850 is completed above. In this chapter, we will explain the ADC function of the RH850.
AD conversion is to convert time-continuous and amplitude-continuous analog quantities into time-discrete and volt-value discrete digital quantities. Make the output digital quantity proportional to the input analog quantity. There are four stages in the process of AD conversion, namely sampling, holding, quantization and encoding.
Sampling is the process of converting a continuous analog signal into a digital signal. After sampling, the analog signal with continuous time and continuous value becomes a signal with discrete time and continuous value, which is called sampling signal. The sampling circuit is equivalent to an analog switch, and the analog switch works periodically. Theoretically, in each cycle, the closing time of the analog switch approaches 0. At the moment when the analog switch is closed (sampling moment), we "collect" a "sample" of the analog signal.
ADCA0 block diagram is as follows
AD conversion key technical parameters
(1) Resolution (Resolution)
Resolution, also known as precision, is usually expressed in the number of bits of a digital signal. Define the ratio of full scale to 2^n (n is the number of bits of AD device). The resolution indicates the amount of change in the input analog voltage required for the output digital quantity to change an adjacent digital quantity. The more bits, the higher the resolution.
(2) Conversion time (Conversion Rate)
Conversion time refers to the time required to complete an AD conversion from analog to digital. The conversion time of integral type AD is millisecond level and belongs to low-speed AD, successive comparison type AD is microsecond level and belongs to medium-speed AD, and the full parallel/serial parallel type AD can reach nanosecond level. Sampling time is another concept, referring to the interval between two conversions. In order to ensure the correct completion of the conversion, the sampling rate (Sample Rate) must be less than or equal to the conversion rate. It is therefore customary to numerically equate the conversion rate to the sampling rate. Commonly used units are Ksps and Msps, which means one thousand/million samples per second (Kilo/Million Samples Per Second).
(3) Quantizing Error (Quantizing Error)
The error due to the finite resolution of AD, that is, the maximum deviation between the step-like transfer characteristic curve of finite resolution AD and the transfer characteristic curve (straight line) of infinite resolution AD (ideal AD). Usually it is the analog variation of 1 or half of the smallest digital quantity, expressed as 1LSB, 1/2LSB.
(4) Offset Error (Offset Error)
When the input signal is lightning, the output signal is not zero, and the external potentiometer can be adjusted to the minimum.
(5) Full Scale Error (Full Scale Error)
The difference between the input signal corresponding to the full-scale output and the ideal input signal value.
(6) Linearity (Lineafity)
The maximum deviation between the transfer function of the actual converter and the ideal straight line, excluding the above three kinds of errors AD Other indicators include absolute accuracy (Absolute Accuracy), relative accuracy (Relative Accuracy), differential nonlinearity, monotonicity and error-free code , Total Harmonic Distortion (THD, Total Harmonic Distotortion) and integral nonlinearity, etc.
The external analog multiplexing connection diagram is as follows
An external analog multiplexer (MPX) can be connected to any input signal pin ADCA0I0 ~ ADCA0I19S .
1.1, ADCAnVCRj — virtual channel register
Virtual channel 0 of ADCA0 is linked to physical channel ADCA0I0 .
| Bit position |
Bit Name |
Function |
| 15 |
MPXE |
MPX enabled 0: MPX is disabled , no wait is inserted before A/D conversion. 1: MPX is allowed. MPXV[2:0] bit is from ADCAnSEL0 to ADCAnSEL2 when the virtual channel starts, and the waiting time is to insert 1 A/D conversion time before A/D conversion. |
| 14 - 12 |
MPXV |
These bits are used to set up the MPX multiplexer that is routed to the external analog . |
| 9 |
CNVCLS |
A/D conversion type self-diagnosis selection 0: Self-diagnosis hold value A/D conversion. 1: Indicates normal A/D conversion during self-diagnosis. A/D conversion is normal during self-diagnosis, and when MPX is in use (MPXE has been set) , insert a wait for A /D conversion time to perform A/D conversion. On the other hand, MPX cannot be used to perform hold value A/D conversion during self-diagnosis . |
| 8 |
CHICKEN |
A/D conversion complete interrupt enable 0: Do not generate scan group x end interrupt (INT_SGx) during A/D The switching of virtual channel j ends at SGx. 1: Generate scan group x end interrupt (INT_SGx) during A/D conversion For virtual channel j ending at SGx. |
| 7 - 6 |
ULS |
Upper and lower limit table selection 00: Do not check the upper and lower limits. 01: Check the upper and lower limits of ADCAnULLMTBR0. 10: Check the upper and lower limits of ADCAnULLMTBR1. 11: Check the upper and lower limits of ADCAnULLMTBR2 . |
| 5 - 0 |
GCTRL |
physical channel selection 0H ~ 23H: Select the corresponding ANInm. 24H: Select A/D converter diagnostic channel. Others: Setting prohibited . |
1.2, ADCAnADCR — A/D control register
| Bit position |
Bit Name |
Function |
| 7 |
DGON |
Self-diagnostic voltage backup control 0: Turn off the self-diagnostic voltage circuit. 1: Self-diagnostic voltage circuit open, or reference voltage. |
| 5 |
CRACK |
alignment control 0: The result of the conversion to PWDDR and ADCAnDRj is stored right-justified. 1: The result of the conversion to PWDDR and ADCAnDRj is stored left justified . |
| 4 |
CTYP |
12/10 bit selection mode 0: 12-bit mode 1: 10-bit mode |
| 1 - 0 |
SUSMTD |
Pause mode selection These bits are used to select the suspend method group to interrupt the low priority scan group while the high priority scan is in progress. 00: Synchronous suspension on high priority SG or SVSTOP interrupt. 01:当高优先级SG (SG2, SG3, SG4)和SVSTOP中断SG1，同步挂起时优先级更高。SG (SG3, SG4)和SVSTOP中断SG2，或者优先级更高的SG (SG4)和SVSTOP中断SG3。 10:高优先级SG或SVSTOP中断时，异步挂起。 11:设置禁止 |
1.3、ADCAnSMPCR — 采样控制寄存器
| Bit position |
Bit Name |
Function |
| 7 - 0 |
SMPT |
这些位用于设置采样时间(循环数)。 12H: 18个周期(ADCLK = 8兆赫到32兆赫) 18H: 24个周期(ADCLK = 8兆赫到40兆赫) 禁止进行上述以外的设置。 |
1.4、ADCAnSFTCR — 安全控制寄存器
| Bit position |
Bit Name |
Function |
| 4 |
RDCLRE |
读取和清除启用 当读取A/D转换结果时，该位选择A/D转换结果由硬件清除。 0:ADCAnPWDTSNDR/ADCAnDRj和ADCAnPWDDIR/ ADCAnDRj是不可读的。 1:ADCAnPWDTSNDR/ADCAnDRj/ADCAnPWDDIR/ ADCAnDR/ADCAnPWDTSNDR/ADCAnDRj/ADCAnPWDDIR/ADCAnDIRj是可读的。 |
| 3 |
ULEIE |
A/D错误中断(INT_ADE)上下限错误检测使能 0:禁用 1:启用 |
| 2 |
OWEIE |
A/D错误中断(INT_ADE)使能覆盖错误检测功能 0:禁用 1:启用 |
1.5、ADCAnSGCRx — 扫描控制寄存器
| Bit position |
Bit Name |
Function |
| 5 |
SCANMD |
扫描模式 0:多循环扫描模式 1:连续扫描模式 对于SG2和SG3，在这个位上写0。 |
| 4 |
ADIE |
扫描结束中断启用 0:扫描结束时不输出INT_SGx。 1:扫描结束时输出INT_SGx。 |
| 3 - 2 |
SCT |
通道重复次数选择 00:选择的通道重复次数为1。 01:选择的通道重复次数为2。 10:选择通道重复次数为4次。 11:设置禁止 |
| 0 |
TRGMD |
触发模式 0:禁用SGx_TRG的触发器输入(禁用硬件触发器)。 1: SGx_TRG启动触发器或保持完成触发器A/B触发输入到SGx。 |
1.6、ADCAnSGVCSPx — 扫描组x启动虚拟通道指针
| Bit position |
Bit Name |
Function |
| 5 - 0 |
VCSP |
启动虚拟通道指针 这些位用于指定开始SGx扫描的虚拟通道。 |
1.71.7、ADCAnSGVCSPx — 扫描组x结束虚拟通道指针
| Bit position |
Bit Name |
Function |
| 5 - 0 |
VCEP |
虚拟通道指针 这些位用于结束指定SGx扫描所处的虚拟通道。 |
例：例程：
void ADC_Init(void)
{
AP_init(); //Gpio init
/* ADCA0 */
ADCA0VCR00 = 0x00u; /* Virtual Channel 0 of ADCA0 is linked to physical channel ADCA0I0 */
/* Upper/lower limit not checked / No scan group interrupt is output */
ADCA0VCR01 = 0x01u;
ADCA0ADCR = 0x00u; /* Asynchronous suspend / 12bit mode */
/* The self-diagnostic voltage circuit is turned off */
ADCA0SMPCR = 0x12u; /* Set sampling time to 18*1/40MHz = 0.45us */
ADCA0SFTCR = 0x00u; /* Upper/Lower limit error disabled / DR/DIR registers are not cleared when read */
ADCA0SGCR1 = 0x11u; /* ScanGroup interrupt is output when scan ends */
/* SGx_TRG start trigger or hold complete trigger A/B is selected for
the trigger input to SGx. Set to 1'b. */
/* ScanGroup start/end registers */
ADCA0SGVCSP1 = 0x00u; /* ScanGroup starts at virtual channel 0 */
ADCA0SGVCEP1 = 0x07u; /* ScanGroup ends at virtual channel 7 */
}