Table of Contents
Abstract 1
1. Practice purpose and significance 2
2. Practical tasks and cooperation 2
3. Program structure description 2 4.
Bare metal hardware simulation design 3
(1) CPU design 3
(2) Memory design 3
(3) Hard disk design 4
(4 ) Address line data line 4
5. General data structure design 4
(1) Page table design 4
(2) PCB design 5
(3) JCB design 5
(4) System global variables 6
6. Module design instructions 7
(1) Job management 7
(2) Process management 8
(3) Page management 11
(4) Scheduling algorithm 13
(5) Interface module 14
7. References 14
Attachment 1: Program file and structure description 15
Attachment 2: Class diagram description 16
3. Program structure Explanation
The structural design of this system refers to the device management chapter of the operating system textbook, which can be divided into hardware, hardware driver, system management module, system kernel, and UI interface from the bottom up. At the same time, since the emulation of the hardware itself includes the functions of storing and reading, the hardware and the hardware driver are combined. In the system management module part, it is divided into three parts: job management, process management and page management. In the kernel part of the system, the system provides global variables of the system and operation classes of the system, which are used to integrate the three modules under it. Further up, that is, the UI interface provided by JAVA can facilitate users to use the system.
The overall structure design of the program is shown in the figure.
4. Bare metal hardware simulation design
(1) CPU design
CPU hardware includes timer and MMU. When programming, it is necessary to separate the two and design three classes, the CPU class "cpu", the timer class "timer", and the MMU hardware class "mmu". There is only one instance of timer and MMU in the cpu class, which can reflect the concept that timer and MMU are included in CPU. Any call to the timer and MMU needs to be done through the instance in the cpu class, and cannot be accessed directly.
The CPU class is defined as:
public class CPU
{ public static CPU cpu=new CPU(); public Timer ti; public MMU mm; } CPU structure and content: 1. Address register PC 2. PSW program status register 3. IR ( Instruction register) 4. Page base address register CR3 5. The number of instructions executed at the end of the time slice already_run (2) Memory design
The memory size is 32KB, so the memory class can be designed according to this requirement. This class has an object array with a total size of 32KB, which is short type. Because the system requires address lines and data lines to be 16 bits, so in the design of the system, Use short type data uniformly. Note: the memory class is a mapping of a file. Therefore, before the class is instantiated, its constructor needs to map from a file to an object, that is, read the content of the file and initialize the instance according to the content of the file. The memory hardware class memory simply simulates the hardware, does not require too many complicated operations, and only needs to provide two basic operations, that is, data storage and retrieval. However, the storage and retrieval of data need to pass through the address line and the data line.
The definition of the memory class is:
public class Memory
{ public static Memory memory=new Memory(); private byte []data=new byte[32*1024]; //32KB=32768B } The total memory size is 32KB, and the regulation: the first 16KB It is the kernel area, and the last 16KB is the user area. The content stored in the kernel area: core stack + system kernel, all PCB information of the process. In summary, the memory structure is: core stack + system kernel (1 page), PCB pool (31 page), user area (32 pages)
