Master the basics of C51 single-chip microcomputer in one day 1-computer numerical value and MCS51 single-chip microcomputer

Introduction

This note refers to the teaching video of teacher Gao Hongliang at station B: Click to watch

numerical representation of the computer

source code

Positive number: the first digit is 0, the remaining seven digits represent the actual value
Negative number: the first digit is 1, the remaining seven digits represent the actual value

The disadvantage is that some calculations will be wrong, and additional algorithms are required to process them, which is very troublesome

inverse code

Positive number: the first digit is 0, and the remaining seven digits represent the actual value
Negative number: the first digit is 1, and the remaining seven digits are the result of bitwise inversion of the seven digits of the positive number

For example: positive number 01011100, negative number 10100011

The disadvantage is that there will be one less 1 in positive and negative operations or negative and negative operations

Complement

Perfect coding method, no fatal errors, almost all computers use this coding system

Positive number: the first digit is 0, and the remaining seven digits represent the actual value
Negative number: the first digit is 1, and the remaining seven digits are the inverse of the seven digits of the positive number, then add one

For example: positive number 01111000, negative number 10000111

The function of adding one at the end is to offset the phenomenon of "error 1" in the inverse code

MCS51 MCU

Model and Composition

MCS-51 microcontroller model corresponding parameter analysis diagram

Basic Internal Structure Diagram

Introduction to common devices

• ACC accumulator: When the ALU performs operations, most of the data comes from the accumulator A
• PSW flag register: an 8-bit register that saves the status of the instruction execution result

Common Control Parts

• Timing and Control Circuits
• instruction register
• instruction decoder
• program counter PC
• stack pointer SP
• data pointer DPTR

storage structure

program memory ROM

• Store the program when the single chip microcomputer is working, it cannot work without ROM
• MCS51 has a built-in program counter PC, which can indicate the address in ROM of the program that the CPU will process next.
• ROM is available as on-chip memory and off-chip memory (accessed via the bus)

In order to facilitate quick access to on-chip and off-chip ROM, the microcontroller comes with a control line EA to decide whether to use the internal or external ROM
EA=1, high level, when the PC is greater than a certain value, access the off-chip ROM, and access the on-chip ROM at other times
EA=0, low power flat, on-chip ROM is ignored

There are seven special addresses in ROM

Data memory RAM

• With fast access function, the data will be lost immediately after power failure
• There are also two types of on-chip and off-chip

The internal registers are divided into the following main areas

1. Working registers: also known as general-purpose registers, which store 8 pieces of information each time, a total of 4 groups, and each group is represented by R0-R7
2. bit addressable area
3. General RAM area: also called user RAM area, 80 bytes
4. Stack area and stack pointer, install LIFO principle
5. Special function register: similar to a custom variable pool, users can customize it, but it cannot be used for other purposes

External pins and bus interface

When the P0 port (P0.0-P0.7)
is not connected to the off-chip memory and the extended IO port, it is used as a bidirectional IO port;
otherwise, it is time-division multiplexed as the lower eight-bit address bus and the bidirectional data bus;

P1 port (P1.0-P1.7) can be used as a bidirectional IO port

P2 port (P2.0-P2.7) is generally used as a bidirectional IO port, and can be used as a high eight-bit address bus after expanding the external memory

P3 port (P3.0-P3.7) can be used for special purposes in addition to bidirectional IO port

control line

The MCS51 microcontroller reads and writes the internal and external memory through different signals;
the off-chip data memory is read and written through the RD\WR instruction;
the off-chip program memory is read through the PSEN instruction;

Working Principle of Parallel IO Port

There are four main IO ports, they have a special latch function, they are P0 P1 P2 P3

P1

When writing:
D=1, at this time, Q in the lower right corner of the latch is the inversion of D to get 0, at this time, the field effect transistor V1=0, not conducting, VCC=5v directly outputs signal 1 through the pull-up
resistor =0, Q is inverted to get 1, at this time V1=1, the field effect transistor is turned on, so it cancels out with VCC=5v, and the output signal is 0

When reading in:
D=0, the field effect tube is not turned on, and the external signal flows directly through the bottom to bypass

P3

The reading and writing process is almost the same as that of P1 port, but pay attention to the NAND gate in the second functional area, that is, 1 and 1 take 0, 1 and 0 take 1, and so on

P2

MUX data selector, which can be regarded as a single-pole double-throw switch, when control = 0, link the latch; when control = 1, link the address bus;

Working period

crystal oscillator

XTAL1 and XTAL2 ports are external crystal oscillator ports;
the internal crystal oscillator is composed of an inverting amplifier

Reset method

The external circuit causes the RST terminal to appear a high level for two consecutive cycles, and reset is performed at this time;

machine cycle

• The machine cycle contains six S1-S6
• A state contains two beats P1\P2
• A beat is called a clock cycle

instruction cycle

Definition: The cycle process in which the machine fetches an instruction and executes it completely;

An instruction cycle generally consists of 1-2 machine cycles;
only multiplication and division operations need 4 machine cycles to complete;