Segment selector: The 16-bit segment register (CS, DS, ES, SS, FS, GS) in 32-bit assembly no longer stores the segment base address, but the index value of the segment descriptor in the segment descriptor table, D3- The D15 bit is the index value, the D0-D1 bit is the priority level (RPL) for privilege checking, the D2 bit is the descriptor table reference indication bit TI, TI=0 indicates that the descriptor is read from the global description table GDT, TI=1 Instructs to read the descriptor from the LDT in the local descriptor. This information is collectively called segment selector (segment selector).
Segment descriptor: 8 bytes and 64 bits, each segment has a corresponding descriptor. According to the different objects described by the descriptor descriptors, descriptors can be divided into three categories: storage segment descriptors, system segment descriptors, and gate descriptors (control descriptors). Attributes such as the base address, limit length and access type of the segment are defined in the descriptor. The base address gives the base address of the segment, which is used to form a linear address; the limit length describes the length of the segment, which is used for storage space protection; the segment attribute describes the access authority of the segment and the current existence of the segment in memory, and the privilege level at which the segment is located.
Segment descriptor table: The IA-32 processor organizes all segment descriptors in order into a linear table in memory, called the segment descriptor table. Divided into three categories: global descriptor table GDT, local descriptor table LDT and interrupt descriptor table IDT. There is only one GDT and IDT in the whole system, and each task has its own private local descriptor table LDT, which is used to record the various code segments, data segments and stack segments involved in this task and the use of this task. door descriptor. GDT contains the code segment, data segment, stack segment and special data segment descriptors used by the system, as well as the descriptors of all task local descriptor tables LDT.
GDTR global descriptor register: 48 bits, the upper 32 bits store the GDT base address, and the lower 16 bits store the GDT limit length.
LDTR local descriptor register: 16 bits, high 13 is the index value of LDT in GET.
IA-32 processors still use xxxx: yyyyyyyy (segment selector: offset) logically to represent a linear address, so how do you get the base address of the segment? In the above description, we know that to get the base address of the segment, first pass the location of the segment descriptor specified by the TI bit in the segment selector xxxx:
When TI=1, it means that the segment descriptor is in the LDT, as shown in the following figure: ① The GDT base address is obtained from the GDTR register first. ② Obtain the position index of the segment where the LDT is located from the LDTR register (the upper 13 bits of LDTR). ③ Obtain the LDT segment descriptor in the GDT with this position index to obtain the LDT segment base address. ④ Obtain the segment descriptor from the LDT segment with the high 13-bit position index value of the segment selector. ⑤ The segment descriptor contains various attributes such as the base address, length limit, and priority of the segment, which obtains the starting address (base address) of the segment, and then adds the offset address yyyyyyyy to the base address to get the final linearity. address.
