makefile(03)_condition judgment

8. Conditional judgment statement

8.1. Grammar rules

Conditional judgment statements are supported in Makefile, which can directly compare the values ​​and constant values ​​of two different variables.
Note: Conditional judgment statements can only be used to control the statements actually executed by make, and cannot control the execution process of the commands in the rules.
Conditional Interpretation Syntax Description:
makefile(03)_condition judgment
Conditional Judgment Keyword:
makefile(03)_condition judgment
Example:

.PHONY : test

var1 := A
var2 := $(var1)
var3 :=

test:
    ifeq ($(var1),$(var2)) 
        @echo "var1 == var2"
    else
        @echo "var1 != var2"
    endif

    ifneq ($(var2),)
        @echo "var2 is NOT empty"    
    else
        @echo "var2 is empty"    
    endif

    ifdef var2
        @echo "var2 is NOT empty"    
    else
        @echo "var2 is empty"    
    endif

    ifndef var3
        @echo "var3 is empty"    
    else
        @echo "var3 is NOT empty"    
    endif

Output result:
makefile(03)_condition judgment

8.2. Engineering experience

1. There can be spaces before the conditional statement, but no Tab characters ('\t')
2. Do not use automatic variables ( $@ $^ @<)
in the conditional statement 3. A complete conditional statement must be located in the same 4. Conditional judgment in a Makefile is
similar to macros in C language. It is valid in the preprocessing stage, but invalid
in the execution stage. 5. When Make loads the Makefile, it first calculates the value of the expression (different assignment methods, different calculation methods), according to the judgment statement pure The expression determines what is executed.
Question, is the following Makefile the same after execution? ?
makefile(03)_condition judgment
Answer: Different, the former assignment method can be used to judge whether the variable is defined when make loads the Makefile, while the latter cannot make a judgment.
Example:

.PHONY : test

var1 :=
var2 := $(var1)

var3 =
var4 = $(var3)

#var3 = 3 

test:
    ifdef var1 
        @echo "var1 is defined"
    else
        @echo "var1 is NOT defined"
    endif

    ifdef var2
        @echo "var2 is defined"    
    else
        @echo "var2 is NOT defined"    
    endif

    ifdef var3 
        @echo "var3 is defined"
    else
        @echo "var3 is NOT defined"
    endif

    ifdef var4
        @echo "var4 is defined"    
    else
        @echo "var4 is NOT defined"    
    endif

Output result:
makefile(03)_condition judgment

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