make/Makefile: project automated build tool
Makefile
Makefile is a text file that records the construction rule flow of the project
Makefile writing rules
Target object: dependent object
/t (indent) specific execution instructions
For example:
test.exe is the target object
test.c is the dependent object
gcc -g test.c -o test.exe is the specific operation instruction
Predefined variables
$@ means the target object
$^ means all dependent objects
$< means the first dependent object
Pseudo object
Pseudo-object: Declare that a target object has nothing to do with external files, which means that the object must be regenerated every time, regardless of whether it is the latest.
Format example:
.PHONY:clean
clean:
rm -rf test
Note: The declared pseudo-object can have no dependent objects And do it directly
make
make is an interpreter, which interprets and executes the build rules recorded in the Makefile step by step to complete the construction of the project
Interpretation and execution rules of make
1. Hit the make command in the command line, it means to run the make interpreter, the program will find a file named makefile/Makefile in the current directory, and interpret and execute the project composition rules.
2. In the rules, find the one to be generated The first target object, (judging whether the object already exists, and if it exists, it needs to be regenerated-based on the last modification time of the file), and then execute the object generation instruction
3. Make will only find the first When a target object is generated, it will exit after generation. The second object will not be regenerated.
4. When generating the target object, make will first look for the generation rules of the dependent object, first generate the dependent object, and then generate the target object.
Code example
Let's look at a piece of code to actually understand the above content:
