[51 single chip microcomputer] Optional key wrong questions

Must understand memory, knowing how to do each question is the most important thing, knowing why

fill in the blank

  1. The difference between a single-chip microcomputer and an ordinary microcomputer is that it connects the three parts of ___, ___ and ___ through internal ___ and integrates them on a chip. Answer: CPU, memory , I/O port, bus
  2. The dedicated single-chip microcomputer has simplified the system structure and optimized the use of software and hardware resources, thereby greatly reducing ___ and improving ___. Answer: Cost, reliability .
  3. The on-chip byte address is the lowest bit address of the 2AH unit is ___; the on-chip byte address is the lowest bit address of the A8H unit is ___. Answer: 50H, A8H
  4. If the content in A is 63H, then the value of the P flag bit is ___. Answer: 0
  5. When implementing a subroutine call by stack operation, the contents of ___ must be put on the stack first to protect the breakpoint. When calling the subroutine return instruction, the stack protection is performed again, and the protected breakpoint is returned to ___, and the content in the original ___ is popped up first. Answer: PC, PC, PCH
  6. When AT89S52 microcontroller uses off-chip oscillator as a clock signal, pin XTAL1 is connected to ___, and pin XTAL2 is connected to ___. Answer: The output signal of the off-chip oscillator, floating
  7. To access SFR, only ___ addressing mode can be used. Answer: Directly .
  8. Assuming that the content of accumulator A is 30H, execute the instruction 1000H: MOVCA, @A+PC, and send the content of the program memory ___ unit to accumulator A. Answer: 1031H
  9. After the AT89S52 microcontroller responds to the interrupt, it generates the long call instruction LCALL. The process of executing the instruction includes: first push the content of ___ into the stack for breakpoint protection, and then send the 16-bit address of the long call instruction to ___, The program execution is redirected to the interrupt address area in ___. Answer: PC, PC, program memory
  10. If (IP)=00010100B, the one with the highest priority is ___, and the one with the lowest priority is ___. Answer: External interrupt 1, timer T1
  11. The baud rate of serial port mode 0 is ____. Answer: fosc/12
  12. Among the four working modes of the serial port of the AT89S52 microcontroller, the baud rate of __ and __ is adjustable, which is related to the overflow rate of the timer/counter T1, and the baud rate of the other two methods is fixed. Answer: Method 1, Method 3
  13. The baud rate of serial port working mode 1 is ___. Answer: Mode 1 baud rate = (2SMOD/32) × overflow rate of timer T1
  14. When the serial port of AT89S52 expands the parallel I/O port, the working mode of the serial interface is selected ( mode 0 )

Serial port

  1. To detect whether the switch is in the closed state or the open state, simply connect one end of the switch to the pin of the I/O port and the other end to ground, and then detect ______. Answer: I/O port pin level
  2. For a digital tube with a common cathode with a decimal point segment, the segment code that displays the character "6" (a segment corresponds to the lowest digit of the segment code) is ___; for a digital tube with a common anode with a decimal point segment, the display character "3" The segment code is. Answer: 7DH, B0H [You must not be careless, you must draw the segment code before you can continue]
  3. LCD 1602 is a ___ type liquid crystal display module. When displaying characters, only ___ of the characters to be displayed is written into the display data RAM (DDRAM) of LCD 1602 by the microcontroller, and the internal control circuit can display the characters on the LCD show. Answer: Character, ASCII code
  4. The LCD 1602 display module has ___bytes of ___ RAM, as well as byte customization ___. Users can define ___ 5×7 dot matrix characters by themselves. Answer: 80, display data, 64, character RAM, 8

expand

  1. In the memory expansion, both the line selection method and the decoding method ultimately provide ___ control signals for the ___ end of the expansion chip. Answer: Chip selection .
  2. If the first address of the 32KB data memory is 4000H, the last address is ___H. Answer: BFFF
  3. 74LS138 is a decoder chip with 3 inputs. Its output is often used as a chip select signal. Any one of the ___ chips can be selected, and only one output is ___ level, and the other outputs are __ _Level. Answer: 8, low, high ;
  4. There are two ways to read the parallel I/O port information of AT89S52: one is to read the pin, and the other is to read the latch___ .

Test questions:

  1. The ninth bit data sent by serial port mode 3 must be written into the ( TB8 ) bit of the ( SCON ) register in advance .
  2. The 81C55 can be used to expand ( 3 ) parallel ports and ( 256 ) RAM units.
  3. It is known that fosc=12MHz, and when T0 is used as a timer, its timing interval is ( 1us ).
  4. If the first address of AT89S51 extended 8KB program memory is 1000H, then the last address is ( 2FFFH )H.
  5. The addressing modes of the AT89S51 microcontroller command system include ( register addressing mode ), ( direct addressing mode ), ( immediate addressing mode ), ( register indirect addressing mode ), ( bit addressing mode ), ( base address register plus Index register ) , ( relative addressing mode ).
  6. When AT89S51 executes MOVC A, @A+PC instructions, the accompanying ( PSEN* ) control signal is valid.
  7. Single-chip MCU, digital signal processor DSP and embedded microprocessor EMPU have different focuses. ( Single-chip microcomputer ) specializes in measurement and control. ( EMPU ) can be used to configure real-time multitasking operating systems. ( DSP ) is good at complex and high-speed operations. .
  8. When the serial port works in mode 3, the 8-bit data to be transmitted is sent out by the serial port ( SBUF/transmit buffer ), and the ninth bit data must be written to the ( TB8 ) bit of the special function register ( SCON ) in advance .
  9. Knowing (A)=03H, (SP)=60H, (59H)=01H, (60H)=02H, (61H)=2CH, execute the instruction
    • PUSH Acc
    • RIGHT
    • After that, (SP)=( 5FH ), (PC)=( 0302H ), (61H)=( 03H ).
  10. To build a single-chip off-chip bus to expand the memory, the P0 port and P2 port should be used as the ( address ) bus, and the P0 port as the ( data ) bus.
  11. The meaning of D/A converter resolution is: the output change of ( analog quantity ) caused by the input change of ( unit digital quantity ) .
  12. When AT89S51 microcontroller expands the memory, the control buses involved are: ( ALE ), ( EA ), (PSEN ), WR, RD.
  13. The "timing" of the timer/counter is to count the internal ( machine cycle ), and its "count" is to count the ( external pulse ) on the P3.4 and P3.5 pins .
  14. The ninth bit data sent by serial port mode 3 must be written into the ( TB8 ) bit of the ( SCON ) register in advance .
  15. The 81C55 can be used to expand ( 3 ) parallel ports and ( 256 ) RAM units.
  16. It is known that fosc=12MHz, and when T0 is used as a timer, its timing interval is ( 1us ).
  17. If the first address of AT89S51 extended 8KB program memory is 1000H, then the last address is ( 1FFFH )H.
  18. The addressing modes of the AT89S51 microcontroller command system include ( register addressing mode ), ( direct addressing mode ), ( immediate addressing mode ), ( register indirect addressing mode ), ( bit addressing mode ), ( base address register plus Index register ) , ( relative addressing mode ).
  19. When AT89S51 executes MOVC A, @A+PC instructions, the accompanying ( PSEN* ) control signal is valid.
  20. Single-chip MCU, digital signal processor DSP and embedded microprocessor EMPU have different focuses. ( Single-chip microcomputer ) specializes in measurement and control. ( EMPU ) can be used to configure real-time multitasking operating systems. ( DSP ) is good at complex and high-speed operations. .
  21. When the serial port works in mode 3, the 8-bit data to be transmitted is sent out by the serial port ( SBUF/transmit buffer ), and the ninth bit data must be written to the ( TB8 ) bit of the special function register ( SCON ) in advance .
  22. Knowing that (A)=03H, (SP)=60H, (59H)=01H, (60H)=02H, (61H)=2CH, after executing the instruction
    * PUSH Acc
    * RET
    *, (SP)=( 5FH ), (PC) = ( 0302H ), (61H) = ( 03H ).
  23. To build a single-chip off-chip bus to expand the memory, the P0 port and P2 port should be used as the ( address ) bus, and the P0 port as the ( data ) bus.
  24. The meaning of D/A converter resolution is: the output change of ( analog quantity ) caused by the input change of ( unit digital quantity ) .
  25. When AT89S51 microcontroller expands the memory, the control buses involved are: ( ALE ), ( EA* ), ( PSEN* ), WR and RD.
  26. The "timing" of the timer/counter is to count the internal ( machine cycle ), and its "count" is to count the ( external pulse ) on the P3.4 and P3.5 pins .
  27. When using the serial port for serial communication, in order to reduce the baud rate error, the clock frequency used is ___MHz. Answer: 11.0592
  28. When the timer/counter is used as a timer mode, its counting pulse is provided by ___, and the timing time is related to ____. Answer: After the system clock signal is divided by 12, the initial value of the timer
  29. Timer T2 has 3 working modes: ___, ___ and ___, which can be selected by software setting the relevant bits in the register ___. Answer: Capture, reload (up or down count), baud rate generator, T2CON
  30. A. The special function register SCON has nothing to do with the control of the timer/counter. Correct
  31. After the AT89S52 microcontroller responds to the interrupt, it generates the long call instruction LCALL. The process of executing the instruction includes: first push the content of ___ onto the stack for breakpoint protection, and then send the 16-bit address of the long call instruction to ___ to make The program execution shifts to the interrupt address area in ___. Answer: PC, PC, program memory
  32. In the register indirect addressing mode, the "indirect" is reflected in the instruction that the content of the register is not the operand, but the ___ of the operand. Answer: Address

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Origin blog.csdn.net/weixin_43801418/article/details/111088740