Audio peripheral term definition

MCLK master clock

The clock output frequency is 256 × FS or 384 x FS, where FS is the audio signal sampling frequency

[External link image transfer failed. The origin site may have an anti-leech link mechanism. It is recommended to save the image and upload it directly (img-ehZgXoLF-1611515023963)(readme.image/image-20210124172152630.png)]

Serial clock frequency SCLK

It is also called bit clock frequency BCLK, the rate of acquisition bit, audio stream data encoded with PCM digital amplitude, 16bit represents a state amplitude,
the frequency of 2 bytes SCLK = 2 × sampling frequency × sampling number

stereo stereo

Stereo is the audio stream data with left and right channels, Mono

PCM

Pulse amplitude coding
16bit length, with sign bit, it means ±

PDM

Pulse density coding
1bit length, only 0,1

Frame clock LRCLK is also called WS sampling rate

Used to switch the left and right channel data.
LRCLK of "1" indicates that the data of the right channel is being transmitted.
LRCLK of "0" indicates that the data of the left channel is being transmitted.
The frequency of LRCLK is equal to the sampling frequency.

Use scenario
requires audio stream data with a sampling rate of 16khz, that is, the frame clock is 16khz, 1ms one frame of audio data,
whether the encoding method is PCM or PDM, serial communication data is all bit sampling (that is, on the rising edge of the SCLK clock or Sampling on the falling edge to determine that the current data is 1 or 0), but the final data has a different meaning. PCM is directly the amplitude, while PDM needs to be converted to PCM

Because of the different encoding methods, the definition of a frame is different.
PCM is 16bit as a frame.
PDM because the need to convert PCM involves data extraction (that is, when the PDM to PCM software call interface specifies that 16khz PCM data is required, 8 A byte of PDM data is input, and a PCM data is output, so PDM needs 8*8=64bit data for one frame)
The sampling rate at this time,注意采样率16khz,1ms,16帧

ws is the output pin of the single-chip microcomputer —> is connected to the L/R switch pin of the sensor, usually the sensor manufacturer will have a sensor data sheet DataSheet

[External link image transfer failed. The source site may have an anti-leech link mechanism. It is recommended to save the image and upload it directly (img-sFIbGenk-1611515023965)(readme.image/image-20210124155152677.png)]

It can be seen that the SEL of No. 2 sensor is grounded, the one-bit data of the No. 2 sensor is obtained by the microcontroller sampling on the rising edge of the serial clock, and the SEL pin of the No. 1 sensor is connected to the high level. 1 bit data of sensor 1.

Some peripherals such as SAI interface peripherals choose PDM interface, but there is no WS pin. The WS pin exists in the I2S protocol, which is used to connect the SEL pin of the sensor or the pin of other names. The function of these pins is to set the edge of the sensor. , Which channel of data is output.

The setting of ws sampling rate is to set the time to read a certain channel, control it within the range of sampling rate, and switch to output high level or output low level when reading the next channel

If the original data is PDM encoded, it needs to be converted to 16khz PCM encoded data, and the interface requires 8 bytes of PDM data to output a frame of PCM

Its ratio PCM 16bit: PDM 64bit

The data interface is connected to two mics, namely dual-channel, ws is connected to the SEL pin, our serial clock frequency should be:SCLK = 64bit一帧 * 2声道 * 16khz采样率 = 2.048mhz

This clock frequency can be 1ms to get 2048 bits, including the data of two channels, get the data of one channel, and then divide by 2 = 1024 bits, converted into frames 1024/64 = 16 frames, that is, 16 frames are collected per channel 1ms Data, the sampling rate is 16khz.

Guess you like

Origin blog.csdn.net/weixin_42892101/article/details/113101583