My AD rule notes:
I learned AD to make some boards by myself, and I read a lot of boards designed by others, reviewed boards, and summarized some small experiences, and share them. If there are errors, please correct me
(some of the materials mentioned in my exchange group are available, Welcome big guys to bring: Group: 773080352, you can come if you have any problems, maybe I have stepped on the pits you encounter)
1. The mechanical layer must remember to put the board frame! ! ! !
2. Some signal lines must meet the 3W principle, and signal interference is 80%.
(The 3W principle means that when multiple high-speed signal lines are routed for a long distance, the spacing should follow the 3W principle, such as clock lines, differential lines, video Audio signal lines, reset signal lines and other key circuits of the system need to follow the 3W principle, and not all wiring on the board must comply with the 3W principle.)
3. Through hole inner diameter: 12mil; outer diameter 22mil (minimum)
4. Wire The width is at least 6mil (affected by processing, make the board in JLC)
5. The power line (large current) is at least 15mil or more (to be precise, it depends on the actual situation. I refer to a current manual called the US military standard. Generally copper Skin thickness 1OZ)
6. The rules must be paid attention to! ! ! (It means that the rules in AD should be designed accurately, and don't be careless)
7. The silk screen distance should be set and not over the pad! (The silk screen goes on the pad and it disappears)
8. The differential line must be of equal length, and the spacing requirements are the same as the normal line (such as USB differential line). This directly sets the differential pair and uses a lot of places.
9. Teardrop: line and There is a certain arc in the place where the pad is connected; (AD shortcut key: TE+OK)
10. The signal line must not go at right angles and sharp angles (teardrop resolution)
11. Pay attention to the spacing at high frequencies, and you can use arcs instead of corners (curves also Pretty good-looking)
12. Perform DRC first and then pave the copper (referring to the ground copper).
13. The filter capacitor should be close to the IC and power supply pins (the closer the effect is, the better)
14. The basic output line of the power supply is drawn from the back of the filter decoupling.
15. The mechanical layer is the frame, keepout is the forbidden wiring layer, and the silk screen is the surface.
16. Add more through holes between the front and rear boards of the power supply copper to ensure that the current passes
17. The power supply is reduced Via, because the via has a voltage drop
18, the copper skin cannot protrude at right angles
, and the copper is laid 19, the copper skin spacing is more than 10mil
20, the via hole should be spaced to prevent plane division
21, the crystal should be closer to the IC
22, the crystal should be connected to the capacitor to ground It is to stabilize the crystal, and the capacitor is connected to the ground to assist in the vibration.
23. Do not punch the via hole on the pad (it is said that it is easy to drop the pad, anyway, I have not dropped it now) and the silk screen (if you can connect it for heat dissipation) On the pad)
24. Do not run the wires inside resistors and capacitors (when pi)
25. Do not loop the power line (a ring around the city) to form a large inductance and interfere with the PCB.
26. Cut out the isolated copper.
27. The wires of high-speed wires (such as differential and clock wires) are surrounded by ground wires to prevent interference from other signals, that is, the electromagnetic shielding learned in high schools (this is why the PCB is grounded as a whole, and the copper skin around the wire is covered. Some vias can be properly punched for stability)
28. Remember to cover oil to prevent oxidation of vias! (Especially the dense board, I just turned over the car, the holes are dense and the green oil is not covered)
29. For the chip's power supply line, the common solution is to arrange the thicker power line around the chip power line, and then pass it through Connect the power cord of the chip to the thicker power bus by using vias, because the thicker power bus is to power the entire return system, and the current of the power cord of the chip will be relatively small, so it is not required to be very thick
30 、 The decoupling capacitor is placed close to the power supply, one for each power input terminal
31. Sometimes a 0 ohm resistor is used in the design: connecting the analog ground and the digital ground directly in a large area will cause mutual interference. No short-circuit and improper connection
There are four ways to solve this problem: connect with magnetic beads; connect with capacitor; connect with inductance; connect with 0 ohm resistor. (I basically use 0 ohm to solve it)
(1) The equivalent circuit of the magnetic bead is equivalent to a band-rejection limiter, which can only significantly suppress the noise of a certain frequency point. The noise frequency needs to be estimated in advance in order to select the appropriate model . For situations where the frequency is uncertain or unpredictable, the magnetic beads do not match.
(2) Capacitors cut through and pass through, causing floating.
(3) The inductor is large in size, has many stray parameters, and is unstable.
(4) 0 ohm resistance is equivalent to a very narrow current path, which can effectively limit the loop current and suppress noise. Resistance has an attenuation effect in all frequency bands (zero resistance also has impedance), which is stronger than magnetic beads.
(What will be updated later)