At present, the CPLD of the MAX II series is gradually discontinued. Many projects need to be transplanted to the MAX V series. The most important thing is that the price of the MAX V series is still very beautiful.
Compared with MAX II, the biggest feature of MAX V series devices is that the core voltage is reduced to 1.8V. The low voltage helps reduce power consumption and increase clock frequency.
In the process of project migration, after device reselection and pin reassignment, the following compilation error will be reported:
Error (21191): Supply voltage value 2.5V set to the 'VCCINT' power rail is illegal for the selected device.
or
Error (21191): Supply voltage value 3.3V set to the 'VCCINT' power rail is illegal for the selected device.
The reason is that in the MAX II series project file, the pin constraint is set to 3.3V or 2.5V, and it is easier to modify.
Find .qsfthe file with the suffix (Quartus Settings File) in the project directory, and delete the corresponding constraint line.
set_global_assignment -name POWER_EXT_SUPPLY_VOLTAGE_TO_REGULATOR 3.3V
or
set_global_assignment -name POWER_EXT_SUPPLY_VOLTAGE_TO_REGULATOR 2.5V
Recompile after saving, PASS!
NOTE:
If qsf file is not defined, then the dband incremental_dbtwo folders deleted and then recompiled.