Chapter 2: Computer-System Structures
Computer-System Operation
- I/O devices and the CPU can execute concurrently.
- Each device controller is in charge of a particular device type.
- Each device controller has a local buffer
- CPU moves data from/to main memory to/from local buffers
- I/O is from the device to local buffer of controller.
- Device controller informs CPU that it has finished its operation by causing an interrupt
Interrupt
An event that requires the attention of the OS is an interrupt.
Interrupts may be generated by hardware or software.
An interrupt generated by software (i.e., division by 0) is usually referred to as a trap.
Modern operating systems are interrupt driven, meaning the OS is in action only if an interrupt occurs.
What is Interrupt driven?
- The OS is activated by an interrupt.
- The executing program is suspended.
- Control is transferred to the OS.
- Program continues when the service completes
Interrupt Time Line For a Single Process Doing Output
Common Functions of Interrupts
- Interrupt transfers control to the interrupt service routine generally, through the interrupt vector
- Interrupt architecture must save the address of the interrupted instruction.
- Incoming interrupts are disabledwhile another interrupt is being processed to prevent a lost interrupt
Interrupt Handling
- The operating system preserves the state of the CPU by storing registers and the program counter
- Determines which type of interrupt has occurred: polling or vectored interrupt system
- Separate segments of code determine what action should be taken for each type of interrupt
I/O Structure
After I/O starts, control returns to user program only upon I/O completion.
- Wait instruction idles the CPU until the next interrupt
- Wait loop (contention for memory access).
- AT: At most one I/O request is outstanding at a time, no simultaneous I/O processing.
After I/O starts, control returns to user program without waiting for I/O completion.
- System call
- Device-status tablecontains entry for each I/O device indicating its type, address, and state.
- Operating system indexes into I/O device table to determine device status and to modify table entry to include interrupt
Direct Memory Access Structure
Only one interrupt is generated per block, rather than the one interrupt per byte.
The CPU gives the DMA controller(1)(2)(3),then the PCU goes back to work
- disk address
- memory address
- a byte count
Storage Structure
Storage Hierarchy
- registers
- cache
- main memory
- electronic memory
- magnetic disk
- optical disk
- magnetic tapes
Hardware Protection
Dual-Mode Operation
Target: ensure that an incorrect program cannot cause other programs to execute incorrectly
Realization: Provide hardware support to differentiate between at least two modes of operations. Mode bitadded to computer hardware to indicate the current mode: monitor (0) or user (1).
1.User mode--execution done on behalf of a user.
2.Monitor mode (also kernel modeor system mode) – execution done on behalf of operating system. (Core state or tube state)
Privileged instructions can be issued only in monitor mode.
I/O Protection
All I/O instructions are privileged instruction
Must ensure that a user program could never gain control of the computer in monitor mode
Memory Protection
In order to have memory protection, add two registers that determine the range of legal addresses a program may access:
- Base register – holds the smallest legal physical memory address.
- Limit register – contains the size of the range
Memory outside the defined range is protected.
The load instructions for the baseand limit registers are privileged instructions.
CPU Protection
Timer–interrupts computer after specified period to ensure operating system maintains control. Timer commonly used to implement time sharing, also used to compute the current time.
- Timer is decremented every clock tick.
- When timer reaches the value 0, an interrupt occurs.
Load-timer is a privileged instruction.
