CPU and memory resources are not the only operating system to be managed. I / O devices also have a close interaction with the operating system. As shown in FIG 1-6, I / O device generally includes two parts: the device controller and the device itself. The controller chip is inserted in a circuit board or a group of chips, this circuit board to physically control device. It receives commands from the operating system, e.g., read data from the device, and completes processing data.
In many cases, control of these devices is very complex and specific, so the task of the controller is to provide a simple interface for the operating system (but still very complex). For example, the disk controller can accept a command read from the disk 2 sector number 11206, then the controller the sector number is converted to the linear cylinder, sector and head. Since the outer cylinder there are more sectors than the inner cylinder, and a number of bad sectors has been mapped to other parts of the disk, so this conversion is very complex. Disk controller must be determined on which the head arm cylinder, the cylinder and head number longitudinal arm sent a series of pulses to move to the desired, and then must wait for the sector corresponding to the rotation of the head and starts reading the following data, as the data is read from the drive, the boot block to be erased and a checksum calculation. Finally, we have the input binary bits and place the word memory. In order to complete these tasks, often in the controller to install a small embedded computer, embedded computer running the work for the implementation of these specially programmed program.
Another portion of the I / O device is an actual device itself. The device itself has a relatively simple interface, this is because the interface neither do a lot of work, and they have been standardized. Standardization is necessary, so that any one of the IDE disk controller can accommodate any IDE disk, for example, represents IDE integrated drive electronics (Integrated Drive Electronics), many computer disk standard. Since the actual device interfaces hidden in the controller, so the operating system sees is the interface to the controller, this interface may be very different devices and interfaces.
Each device controller type is different, so that require different software control. Special dialogue with the controller issuing a command and a response receiving software called a device driver (device driver). Each controller manufacturers must provide the appropriate device driver for the supported operating systems. For example, a scanner can be used with Windows 2000, Windows XP, Vista and device drivers for Linux.
To be able to use the device driver, the device driver must be loaded into the operating system so that it can run in kernel mode. Theoretically, the device driver may be run over the inner core, but almost no possible way to support this system, because it requires a controlled manner can be allowed access to the device driver in user space of the device, which is a little support function. To set the device driver into the operating system, there are three ways. The first approach is the kernel and device drivers to re-link, and then restart the system. Many UNIX systems work this way. A second channel is disposed on an operating system entry in the file and notifies the file requires a device driver, an operating system and a file entry is set, and notifies the file requires a device driver, and then restart the system. At system startup, the operating system to find the required device driver and the load. Windows that work this way. The third way is that the operating system is able to accept new device drivers at run time and as soon as it is installed, no need to restart the system. In this way less used, but this approach is becoming popular up. Hot Swap devices, such as USB and IEEE1394 device (discussed later) are dynamically loadable device drivers.
"Each device controller has a small number of registers used for communication. For example, a disk controller will have a minimum specified disk address, memory address, a sector count and direction (read or write) register. To activate the controller, device drivers obtain a command from the operating system, and then translated into a value corresponding to the register and written into the device. the set of all the registers constitute a device I / O port space, we will discuss the contents of Chapter 5.
On some computers, the device registers are mapped into the address space of the operating system (the operating system may use the address), so that they can be stored as an ordinary word as read and write. In such a computer, no dedicated I / O command, the user program may be blocked out hardware, to prevent contact of these memory addresses (e.g., using the base address and limit registers). In some other computer, the device is placed in a register dedicated I / O port space, each register has a port address. In these machines, there is provided specifically IN and OUT instructions can be used in the kernel mode, the device driver for use to read and write these registers. The former method does not require a special I / O instructions, but the number of occupied address space. The latter does not occupy the address space, but the need for specialized instruction. Application of these two methods are very extensive.
Mode input and output of three. In the simplest manner, the user program issues a system call, the kernel process is translated into a corresponding device driver calls. Then the device driver to start I / O and checking the device in a continuous cycle, to see whether or not the work of the device (generally used to indicate the number of bits in the device is still busy). After the end of the I / O, the device driver data to the designated place (if need), and returns. The operating system then returns control to the caller. This is called a busy-wait (busy waiting), the drawback is to occupy CPU, CPU until the polling device has a corresponding I / O operation is completed.
The second way is to start the device and the device driver so that the device sends an interrupt when the operation completes. Device Driver Rollback at this moment. Operating system then blocks the caller if necessary and arrange for other work. When the device driver detects completion of operation of the device, it sends an interrupt notifying operation is completed.
In the operating system, the interruption is very important, so the need for more detailed discussion. In Fig. 1-11a, there is a three-step process of I / O. In step 1, device drivers register by writing to notify the device controller device what to do. Then, the device controller to start the device. When the transfer is complete the device controller is informed of the number of bytes to be read, which uses a particular bus signal in step 2 of the interrupt controller chip. If the interrupt controller is ready to receive interrupt (if you are busy with a higher level of interruption, it may not receive), it will be declared on a pin CPU chip, which is the third step. In step 4, the interrupt controller number of the device on the bus, so the CPU can read bus and know which device has just finished working (probably at the same time there are many devices running).
Once the CPU decides to take an interrupt, the program counter, and typically are pressed into the current PSW to the stack, and the CPU is switched to the user mode. The device number could be a reference to the part of the memory, the device used to find the address of the interrupt handler. This memory is called the interrupt vector (interrupt vector). When the interrupt handler (part of the device driver's interrupt devices) start, it removed the program counter and PSW are pushed onto the stack, and save it, and then query the status of the device. After the interrupt handler is completed, it returns to the head of a user program previously run command has not been executed.
The third way is for the I / O using a special direct memory access (Direct Memory Access, DMA) chip, which can be controlled between the memory controller and the certain bit stream, without continuous CPU intervention. CPU to the DMA chip set, indicating the number of bytes to be transmitted, and memory address related to the device and an operation direction, then start DMA. When the DMA chip is completed, it raises an interrupt, it is processed as previously described. About DMA and I / O hardware will be discussed in detail in Chapter 5.
Interrupted often occur at very inopportune moment, for example, occurred in another interrupt program is running. Because of this, CPU interrupts there are ways to turn off and on again interrupted later. When an interrupt is closed, any interruption device has been issued, you can continue to maintain its interrupt signal, but the CPU is not interrupted until the interrupt is enabled again. If the interrupt is closed, there are multiple devices issued the interrupt, the interrupt controller will decide which treatment to interrupt, usually depending on the advance given to each device's static priority. The highest priority equipment to win the competition.
