Companion OHCI and 1 EHCI port switching
difference 1.1 Companion HC and embedded TT is
discussed in this chapter are the PC USB Host architecture for embedded systems, due to the EHCI (ARC, DWC2, TDI) integrated in the TT in RootHub, there is no need port switching performed using only macro ehci_is_TDI (ehci) can be determined.
When EHCI RootHub integrated TT, since the registers are not standard EHCI PORTSCx speed external devices is described, it is to this problem Vendor be extended:
- one is the use of PORTSCx B27 ... 26 as an external device speed is displayed
- a further species is an extension of an additional register HOSTPCx (Host Port Control, which are extensions to PORTSCx, Linux kernel key is has_hostpc), consists mainly PHCD (PHy Clock Disable) and PSPD (Port SPeed Detection) 2 Ge bit bit example is Intel the Controller Moorestown
1.2 introduces the principle of NXP ISP1561
If the controller includes a PCI companion controller, the USB 2.0 HC (Host Controller) must be used as a multifunction PCI devices. Accompanied HC function code must be less than EHCI HC function code. If only one PCI device comprises a EHCI controller (i.e., no other associated control functions, and other PCI) then according to the PCI specification, EHCI HC function code must be 0. Structure of the parameter register HCSPARAMS N_CC (Num of Companion Controllers) field indicates whether to include companion EHCI HC HC. It indicates the presence of the EHCI HC HC accompanied, if N_CC field is 0, EHCI HC HC is not included when accompanied N_CC field has a non-zero value.
In line with the USB 2.0 specification HC each port can be connected to either a single companion HC can also be connected to EHCI HC. Port logic controlled by the EHCI HC of two mechanisms: a global identity and HC each port controller.
Configured Flag (CF) for setting a logic bit policy, each port has a port private control register bit which allows explicit control EHCI driver logic a single port, whenever CF bit from 0 to 1, the port must be unconditional switch to EHCI HC (Port Owner all the bits becomes 0). When the CF bit is 1, EHCI driver through a single port Port Owner control bits. Similarly, whenever CF from 1 to 0, a connection port unconditional all ports to the appropriate registers accompanying HC. The EHCI HC CF bit defaults to 0.
Through the control port and the CF bit is a complex process, not intends to use in normal operation. Ownership of ports related to the conversion of the normal mode register Port Owner PORTSC EHCI the HC bit is used, when a device is disconnected port notification immediately return to the ownership of ports EHCI controller.
Under normal operating conditions (assuming that all the HC drive has been loaded and operable, EHCI CF bit is already set to 1), a typical port enumeration sequence as follows:
1) that the initial conditions are EHCI port owner, will cause a device is connected to a connection port is detected, the change bit set port, a port change interrupt issued;
2) by verifying the new connection EHCI driver bit change and sends a recognition port HUB change report to the driver;
. 3) driving HUB issued GetPortStatus () request a connection identification change, then it sends a request to change connection is cleared; issued as the next request can be reset and enable port;
4) when the received reset and EHCI driver enable port request, it first checks the value LineStatus PORTSC bit register, if the value is indicated by a full-speed device (e.g. D + is detected) the EHCI driver bit set to 1 PortReset PortEnable bit set to 0 and enters the reset procedure. Software reset duration timer, and then writing a 0 to the termination port reset signal, when the software is read from bit 0 PortReset really reset procedure ends. Check PortEnable PORTSC EHCI driver bit, if the bit is 1, the connected device is a high speed device, EHCI driver (competitor root HUB) issuing a HUB change report to the driver, the driving device continues to enumerate the root HUB connected. When the end of the port reset process, PortEnable bit indicates a full speed device is inserted, the EHCI driver is provided PORTSC PortOwner 1 bit, to release ownership of ports along HC. When set PortOwner EHCI driver bit is 1, the connector port logic state of the associated transceiver port registers are available HC, or the OHCI UHCI devices continue enumeration.
USB 1.3 plug flow switching code devices PORT_OWNER
EHCI RootHub Device Reset (reset, if the device is FS / LS, not Chirp KJ handshake, and the HS Chirp KJ will perform handshaking)
@ hub.c
hub_irq ()
kick_hub_wq ()
hub_event ( )
port_event ()
hub_port_status ()
get_port_status () - This function controls the transmission submitted USB_REQ_GET_STATUS (return four bytes, the low 16 and high 16 wPortStatus wPortChange) to ehci_hub_control ()
the CALL-the IN:
usb_hcd_submit_urb ()
rh_urb_enqueue ()
rh_call_control ()
ehci_hub_control () - corresponding to GetPortStatus branch (bRequestType is USB_DIR_IN | USB_RT_PORT, bRequest is USB_REQ_GET_STATUS), PORT is reset
check_reset_complete () - after PORT reset, check PORTSC the PortEnable bits, if PortEnable bit EHCI RootHub is 0, set PORT_OWNER to 1, to route the PORT the OHCI / UHCI
put_unaligned_le32 (Status, buf) - set the value of 4 bytes in buf (high and low 16-bit 16-bit wPortStatus wPortChange), then returns to the function port_event () in the
next previous step, detected wPortChange & USB_PORT_STAT_C_CONNECTION, continue with the following steps
hub_port_connect_change ()
hub_port_connect ()
hub_port_debounce_be_stable ()
hub_port_debounce () - Since the PORT been routed to OHCI / UHCI, EHCI RootHub PORTSC after re-reading, found no connection Device, so hub_port_connect () will not be behind the high-speed device enumeration
1.4 EHCI Resume switch PORT_OWNER
@ ehci- hub.c
ehci_handover_companion_ports (EHCI);
2 EHCI knowledge
2.1 IAAD - Interrupt Async Advance Doorbell on
different types of transmission URB how to handle unlink
- unlink Control / Bulk URB, call start_unlink_async () process, a two-stage process, starting with the list deleted and then update notification address HC buffer (acts like the update function flush_all_cache CPU cache ()), HC after the completion of the update will trigger STS_IAA interrupt to notify the CPU has a safe unlink
- unlink interrupt urb, refer ehci_urb_dequeue () and qh_completions ( ) was treated
- unlink isochronous urb, reference may ehci_urb_dequeue () and scan_periodic (), the processing itd_complete () in
Figure 2-1 the Generic Queue Head the Unlink Scenario
Re: the WARNING: AT Drivers / USB / Host / EHCI-hcd.c : 287
http://www.archivum.info/[email protected]/2008-03/01679/Re-WARNING-at-drivers-usb-host-ehci-hcd.c-287.html
[PATCH 17 / 25] the USB: the EHCI: The use of IAA for hrtimer Watchdog
https://www.spinics.net/lists/linux-usb/msg67160.html
2.2 Watchdog the Timer
Watchdog the Timer - found mainly used EHCI irq lost (mainly to Isochronous or for irq a bug in the EHCI use need_io_watchdog forced open) case
ehci_irq ()
->
ehci_work () - If the EHCI irq lost, this function can also act as polling roles
->
turn_on_io_watchdog ()
3 Abbreviations
ARC: Argonant RISC Core
CC2530 : TI ChipCon2530
the CCGP: the Generic Windows the USB the Common Class the Parent, Linux kernel similar drive is usb_generic_driver (GENERIC.C)
the CCGP MI_: the Common Class the Parent the Generic Multi Interface
TD_Poll CYPRESS: Task Dispatch
giveback: return - ehci_urb_done () -> usb_hcd_giveback_urb ( ). The USB PD giveback (= 1) means a source of sink responds GotoMin request, to return part of the power source.
halt: stop or stop, from the German; USB endpoint to stop running, return stall handshake. The method of recovery: the Control ep receiving a SETUP PID, the flag is cleared automatically halt; clear_feature reset using other ep ep halt.
IAAD: EHCI Interrupt ON Async Advance Doorbell
ISP1161: Philips' Integrated Host Solution Pairs 1161, "Firms introduce the USB Host the Controllers", HTTPS: //www.eetimes.com/document.asp doc_id = 1,290,054?
MPH: the USB Multi-Port Host , Intel's MPH the Port1 as OTG use, and DWC3 (only slave) using a MUX switch to control Host or UDC connected to the Port1
Quirks: the Attributes of a Device that are Considered to bE noncompliant with expected Operation
SL811HS: Cypress / ScanLogic 811 Host / Slave, performance and ISP1161 (Integrated host Solution Pairs 1161) rather
SPH: Single-Port the USB the Host
the TDI: TransDimension, Inc., a company that invented the first integrated into the TT method of EHCI RootHub, so for embedded systems, eliminating the need OHCI / UHCI hardware, while reducing costs a memorial to the company, Linux kernel defines a macro ehci_is_TDI (ehci); product UHC124 expressed USB Host Controller; the acquisition of ARC USB technology; now chipidea acquisition, chipidea mips has been acquired
TLV: TI Low Value, cost-effective
TPS: TI Performance Solution
TT: transaction Translator (transaction converter converts the packets into USB2.0 USB1.1 package)
when USB Host enumeration -71 error code possible causes: DP and DM traces cause eye is too long difference; reversed pick the DP and DM
