Wow, I've been too busy lately, closed development, so I'm sorry, the blog was forced to be interrupted just at the beginning. This interruption lasted for half a year. I'm really sorry for the few fans who followed me because of the last article. Also thank you for giving me motivation, I am quite happy.
Now, let's go on and hope we can catch up.
In the description of the previous chapter, this figure was quoted, and the principle of synchronization was explained in popular words, as follows
In an ideal world, synchronization would be simple, and these few would suffice! But the reality is different. There are a total of 3 problems in the synchronization error!
Simply put, the sources of error are
1. The error of the host;
2. Link error;
3. The error of the slave;
For this reason, 1588 needs to add a lot of things on the basis of the above figure to ensure reliability and accuracy, especially the accuracy required by measuring instruments and industrial control.
1. The so-called host error
It is said that the clock is generated by the host. The clock signal includes reference indicators such as frequency, period, jitter, and drift. If one's own clock system is not accurate, then all foundations will not exist. That is, the master is inaccurate. Of course, in engineering practice, the master must be inaccurate by default. In other words, the inaccuracy of the master is not within the scope of engineering considerations, but you must be clear that this is a very important source of error.
Solution: There is no solution for this. In the project, the master is required to be accurate. If it is not accurate, it needs to be replaced. You just need to locate that the master is not accurate. In other words, what we can do is to increase A PI controller, there are many reference documents of this kind, and the closed-loop control of this clock is not discussed in this column. What needs to be explained first is that the main method still depends on the chip itself. If the chip is not accurate at all, it really doesn't matter.
2. The so-called link error
It is the average value used when calculating Delay and Offset. The basis of this is that the network is symmetrical and has no delay. However, it is possible that the network load is heavy, and there are switches, routers, etc., switches, etc. Each has its own bottleneck, such a device will make the transmission time unstable, and the network is not necessarily directly connected, it may be a looped network, and the two devices may have many paths to go, which leads to computing delay and offset become unstable.
Solution: Make the link cleaner and be careful not to have loopbacks.
At the same time, in order to continue this problem, two 1588 working modes, E2E and P2P, will be introduced.
3. Finally, let’s talk about the error of the slave, that is, the error of the device you coded.
Continuing to use the above figure, when the sync message is sent from the master, the recorded time is t1, but this time is only a theoretical time, t2, t3, etc. are the same. Specifically, your operating system or your code records the time (whether it is sent or received). When the 1588 message data is sent out, this is the physical layer, and there is a time difference in between.
Specifically, regarding the issue of time accuracy, as mentioned in the first lecture, 1588 is a network protocol for clocks, and time information is encapsulated in network packets, so there is also a problem of assignment . In general communication, the application layer assigns a value to the data structure (the most commonly used is an array), and then the pointer is passed to the protocol stack, and then through the scheduling of the operating system, it finally reaches the MAC layer, and then the real data is transmitted through the PHY. The same is true at the receiving end when it is sent out. Only after the application layer above the operating system receives the message can it be judged that this is a 1588 message, and there is time information in this message.
But the problem is that the assignment of the protocol stack and the scheduling of the operating system are completely unable to meet the requirements of 1588 (1588 can reach up to ns). Because this time is uncontrollable, especially when the operating system or the protocol stack is heavily loaded, it cannot meet the requirements of hard real-time. The following is the seven-layer network of OSI. You can see that UDP, that is, the carrier of the 1588 protocol is on the fourth layer, so 1588 is imagining whether it can be timestamped at a lower layer, and timestamped at the so-called hardware layer. Will be more accurate!
In this way, gPTP is derived, which controls time through the PHY layer or the MAC layer, which is why the L2 layer 1588 is more accurate than the L4 layer 1588 (more on this later)
Remarks: PHY chip manufacturers also support 1588, so it can also be said that it is done in PHY.
This error can be resolved by lower-level timestamping.
I want my readers to know why.