Hello everyone, I am May.
foreword
FTL (Flash Translation Layer), that is, the flash translation layer, is the core algorithm of various storage devices. Its function is to convert the logical address passed down by the Host into a physical address, that is, mapping.
Address mapping is the most primitive and basic function of FTL.
So how does FTL complete the mapping work?
Mapping type
First of all, you need to know that there are three types of mapping:
1. Block mapping
2. Page mapping
3. Hybrid mapping (block mapping + page mapping)
block map
With Block as the mapping unit, a logical block can be mapped to any physical block, so the offset of each page within the block remains unchanged.
A mapping table is also required to record the mapping relationship between logical blocks and physical blocks.
Advantages: Because the mapping table only needs the mapping of blocks, the space occupied by the mapping table is small.
Disadvantages: Poor performance. If the user wants to operate a logical page, he needs to read the data of the entire block, then modify the logical page, and then write it into flash, so the performance of writing small-sized data is extremely poor.
page mapping
With page as the mapping granularity, a logical page can be mapped to any physical page, so the offset of each page in the block can vary widely.
A mapping table is needed to record the mapping relationship between each logical page and physical page.
Advantages: Users can operate a logical page at any time and directly write data into the corresponding physical page, which is convenient and fast, and has excellent performance.
Disadvantages: Since there is a mapping table for each logical page and physical page, and the number of pages is much larger than the number of blocks, the mapping table occupies a large space.
hybrid mapping
Hybrid mapping is a hybrid of block mapping and page mapping.
A logical block can be mapped to any physical block, and the page mapping method is adopted in the block, and the logical page in the block can be mapped to any physical page in the corresponding physical block.
Therefore, both performance and space are between block mapping and page mapping.
Here is a comparison between the different mappings:
mapping principle
Host accesses Flash by sending logical address LBA, and the size of each LBA is 1Sec.
Each Sec has a different size, including 512B, 4KB, and 8KB. In most cases, it is 512B, which is often called a packet of data in the industry.
writing process
Flash is written in units of pages, so the LAB+ data sent by the Host will not be written into it immediately, but will be cached in Dbuf first, and will not be written into Flash until the data volume of 1 page is assembled.
Every time a user writes 1 page of data, FTL will first look for the mapping to see if there is a corresponding mapping relationship with the LBA. If not found, it will find a physical page to write the user data into, and create a new mapping at the same time.
Then, a mapping between user logical address and physical address is generated.
Every time a logical page is written, a mapping table will be generated or updated.
reading process
When a user reads a certain area and sends an LBA for access, FTL will first search in the mapping table pool to find the mapping table corresponding to the LBA, and then FTL will know which physical page of Flash to read the data from.
If the read process does not find the mapping table, the read process fails.
map location
DRAM
Most storage devices have onboard DRAM, and the mapping table can be stored on DRAM
Function: can quickly access the mapping table, fast read and write
Disadvantage: With more and more mapping tables, the occupied DRAM will become larger and larger, which increases the cost and power consumption.
Flash
The later mainstream is that most of the mapping tables are stored in Flash, and a small part of the mapping tables to be used at present is stored in DRAM.
Function: reduce cost and power consumption, and avoid the loss of mapping information caused by power failure. In addition, the Flash space is large, and the mapping table can be stored as much as you want.
When the host sends the LBA, FTL will search in DRAM first. If the corresponding mapping table is not found, it will go to Flash to read the mapping table, and then operate the corresponding physical page according to the mapping relationship.
Disadvantages: It needs to read Flash twice, once for the mapping table, and once for user data. The underlying bandwidth is reduced. For random operations, the efficiency is a little lower.
Mapping table update
With the addition, deletion, and overwriting of the mapping table, the mapping table must be written into Flash for storage at a certain point, so as to avoid the loss of a large number of mapping tables when the power is turned off.
Write the mapping table into Flash from time to time, even if a sudden abnormal power failure occurs, only a small part of the mapping relationship is lost, and it can be restored later by rebuilding the mapping table.
The writing time of the mapping table
1. The number of new mapping tables has accumulated to a certain threshold
2. The amount of data written by users has accumulated to a certain threshold
3. The remaining number of free flash memory blocks has reached a certain threshold
write strategy
1. Update all
Write all the mapping tables, no matter they are new or existing, into Flash.
Advantages: The firmware is simple to implement, and there is no need to consider which mapping tables are new and which ones already exist.
Disadvantages: A large amount of written data affects performance and delay, and increases write amplification.
2. Incremental updates
Only write the newly generated mapping table into Flash.
Advantages: The amount of newly written data is small, the performance is good, and the timeliness is high.
Disadvantages: The firmware implementation is complicated, and it is necessary to distinguish between those newly added mapping tables and which ones are overwritten.
Which writing decision to choose should be considered according to the hardware architecture and the actual situation.
Well, this time I will write here first, I wish you a happy life.
