The CPU has multiple levels of cache, causing the read data to expire.
Because the CPU's processing speed is very fast, the memory speed is very slow in comparison, so in order to improve the overall operating efficiency of the CPU and reduce idle time, the difference between the CPU and the memory There will be a cache layer in between, that is, the existence of the cache layer. Although the capacity of the cache is smaller than that of the memory, the speed of the cache is much faster than that of the memory, and the speed of the L1 cache is second only to the speed of the register. The structure diagram is as follows:
In the figure, from bottom to top are memory, L3 cache, L2 cache, L1 cache, registers, and then the top layer is the 4 cores of the CPU. From the memory, to the L3 cache, to the L2 and L1 caches, they are getting closer and closer to the core of the CPU. The closer they are to the core, the smaller the capacity but the faster the speed. It is precisely because of the existence of the cache layer that our CPU can perform better.
In fact, the visibility of shared variables between threads is not directly caused by multiple cores, but by the L3 cache, L2 cache, and L1 cache we just mentioned, that is, multi-level cache: each core is in When data is obtained, the data will be read from the memory layer by layer. Similarly, subsequent modifications to the data are also written to their own L1 cache first, and then wait for the opportunity to synchronize layer by layer until the memory is finally flushed back. .
Suppose that core 1 modifies the value of variable a and writes it to the L1 cache of core 1, but has not had time to continue to synchronize, because core 1 has its own L1 cache, core 4 cannot directly read core 1 For core 4, the value of variable a is not the latest value after core 1 is modified. The value read by core 4 may be an expired value, which may cause multi-threading. Visibility issues occur.
JMM abstraction: main memory and working memory
What is main memory and working memory
Java, as a high-level language, shields the low-level details of L1 cache, L2 cache, and L3 cache, that is, multi-layer cache, and uses JMM to define a set of specifications for reading and writing data. We no longer need to care about the problems of L1 cache, L2 cache, L3 cache and other multi-layer caches. We only need to care about the concepts of main memory and working memory abstracted by JMM. In order to make it easier for you to understand, you can refer to the following figure:
each thread can only directly access the working memory and cannot directly manipulate the main memory. What is stored in the working memory is the copy of the shared variables of the main memory, the main memory and the work. The communication between memories is controlled by JMM.
The relationship between main memory and working memory
JMM has the following requirements:
(1) All variables are stored in the main memory, and each thread has its own independent working memory, and the content of the variable in the working memory is a copy of the variable in the main memory;
(2) A thread cannot directly read/write variables in the main memory, but can manipulate the variables in its own working memory, and then synchronize to the main memory, so that other threads can see this modification;
(3) The main memory is shared by multiple threads, but the threads do not share their own working memory. If communication between threads is required, it must be completed with the help of main memory transfer.
Hearing this, you may have a deeper understanding of the above picture. As can be seen from the picture, each variable in the working memory is a copy of the main memory variable, which is equivalent to a copy. And there is no line in the figure that can directly connect each working memory, because the communication between the working memory needs to be transferred through the main memory.
It is precisely because all shared variables exist in the main memory, each thread has its own working memory, which stores a copy of the variable, so this copy may be out of date. Let's take an example: if a variable x is modified by thread A. As long as it is not synchronized to the main memory, thread B cannot see it. Therefore, the value of x read by thread B at this time is an expired value, which causes visibility problems.
The multi-layer cache structure of the CPU, and the structure diagram of the JMM main memory and working memory abstracted from this, and also talked about the relationship between the main memory and the working memory.