Why is the concept of multiprogramming supported by interrupt and channel technology?

The concept of multiprogramming

Multi-program design is to store several independent programs in the computer memory at the same time, so that they can run interspersedly under the control of the management program. Two or more programs are in a state between the beginning or the end in the computer system. This is called the characteristic of multi-program technology operation: multi-channel, parallel at the macro level, serial at the micro level.

Why is the concept of multiprogramming supported by interrupt and channel technology?

The use of multi-program design reduces the waste of CPU time, increases system throughput, and improves system efficiency. Why introduce multiple programs? To put it bluntly, it is to improve the throughput and efficiency of the system. In a multi-program system, it is possible to achieve concurrency of multiple programs on a single processor, but when there are I/O tasks, the CPU has to process the I/O tasks, and there is no time to process the execution of multiple programs at this time. Therefore, we must find a way to make the processing of I/O affect the CPU as little as possible (that is, let other things handle I/O, and let the CPU concentrate on processing multiple programs concurrently). At this time, the CPU processing multiple programs can be combined with I/O operations are concurrent, that is, through the overlap of CPU operations and peripheral transmissions in time, the waste of CPU time is reduced and the efficiency of the system is improved. To realize the overlap of CPU operation and peripheral transmission in time, interruption and channel technology support are necessary. The reasons are as follows:
(1) A channel is a hardware mechanism that controls one or more external devices. Once it is started, it will be independent The CPU runs, so input and output operations work in parallel with the CPU. However, the early communication method between the CPU and the channel was that the CPU issued an inquiry instruction to the channel to know whether the channel work was completed (the intermediate process still requires the CPU to participate) . If it is not completed, the host will cyclically query until the end of the channel work. Therefore, this kind of inquiry method cannot truly work in parallel with the CPU and I/O devices.
(2) The interrupt technology is introduced on the hardware. The so-called interrupt is when the input and output ends, or when a hardware failure occurs, the corresponding hardware (ie, the interrupt mechanism) sends a signal to the CPU (the above problem is solved: when the channel work is completed, the interrupt sends a signal to the CPU instead of The CPU is required to continuously send signals to the channel to ask whether the work is completed). At this time, the CPU immediately stops the work at hand and turns to processing the interrupt request, and then resumes the original work at hand after processing the interrupt. Therefore, the combination of channel technology and interrupt technology can realize the parallel work of CPU and I/O device, that is, after the CPU starts the channel to transmit data, it will perform the calculation work of other programs, and the channel will perform input and output operations; when the channel work is over , And then send an interrupt request to the CPU through the interrupt mechanism, and the CPU suspends the operation being performed, processes the interrupt that occurs, and resumes the original work after the processing is completed. In this way, the CPU and I/O devices can work in parallel. At this time, the concept of multiprogramming became a reality.

All in all, the channel takes the place of the CPU to manage the I/O work, and the interrupt will notify the CPU when the I/O work is completed.



Reference material:
What is multiprogramming? What are the characteristics of multiprogramming?
Why does the concept of multiprogramming become useful until the emergence of interrupt and channel technology?

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Origin blog.csdn.net/weixin_43655282/article/details/107119860