table of Contents
STM32 external interrupt introduction
Correspondence between external interrupt lines and 112 IO ports
Introduction to interrupt service functions
Principles of external interrupt and interrupt event request
Interrupt event execution flow
The difference between interrupt and event
Why clear the interrupt flag bit in the interrupt service function?
Why should I enable AFIO related functions in APB2 when configuring the interrupt function?
The difference between remapping and port reuse
EXTI external interrupt
STM32 external interrupt introduction
Correspondence between external interrupt lines and 112 IO ports
Each of the 112 IO ports can be connected to its own external interrupt line. Since there are only 16 external interrupt lines, every 7 IO ports use an external interrupt line, for example: PA4, PB4, PC4... PG4 shares EXTI4 interrupt control bus. Because it is shared, only one IO port of PA4, PB4, PC4...PG4 occupies the external interrupt line at any time.
Introduction to interrupt service functions
Principles of external interrupt and interrupt event request
Interrupt execution flow
Steps to interrupt execution |
Detailed operation |
1 |
Change of input line level |
2 |
Edge detection circuit (there are three detection modes: rising edge, falling edge and rising edge & falling edge) |
3 |
② AND gate circuit (at this time, if the software interrupt request register is set to 1, the OR gate will not depend on the return value of the edge detection circuit and always return 1) |
4 |
The signal is passed into the "request pending register" |
5 |
The signal passes through the AND gate circuit (if the interrupt mask register returns 0, no matter what value the pending register returns will make the NVIC interrupt control register receive a low-level signal) |
6 |
The NVIC controller will directly access the interrupt vector address to execute the corresponding interrupt service function |
We generally say "Only when the interrupt is suspended, the interrupt flag bit will trigger the interrupt and execute the interrupt service function". This sentence means "When the suspend register is requested to be enabled, once the interrupt trigger condition is met, it is When the edge detection circuit returns to a valid level, the interrupt flag bit will be set to 1 (the interrupt flag bit is in the NVIC controller). After the two conditions of "interrupt flag position 1 & interrupt request is suspended" are met, the interrupt service function will be executed immediately ".
There are two library functions to be specifically distinguished here:
USART_ClearFlag |
Clear complete flag |
USART_ClearITPendingBit |
Clear interrupt flag |
Interrupt event execution flow
Steps to interrupt execution |
Detailed operation |
1 |
Change of input line level |
2 |
Edge detection circuit (there are three detection modes: rising edge, falling edge and rising edge & falling edge) |
3 |
② AND gate circuit (at this time, if the software interrupt request register is set to 1, the OR gate will not depend on the return value of the edge detection circuit and always return 1) |
4 |
The signal returned by the OR gate enters the AND gate circuit together with the event mask register. If the event mask register returns 0, the AND gate circuit does not depend on the signal returned by the OR gate and returns 0 directly. |
5 |
If the AND gate returns 1, then the pulse generator will be started, and other functions will be started directly, for example: external interrupt trigger can directly trigger ADC |
6 |
Use pulse triggers to link the corresponding peripherals |
The role of the mask register
We can learn from the above process:
Interrupt mask register |
The return of the mask register to 0 will make the AND gate return to 0 directly, that is, an invalid level. At this time, NVIC interrupt will not be triggered regardless of whether there is an interrupt request |
Event mask register |
The return of the mask register to 0 will make the AND gate return to 0 directly, that is, an invalid level. At this point, it doesn’t matter whether the OR gate returns a valid level, it will not enable the pulse trigger, and will not cause event interruption. |
The difference between interrupt and event
Interrupts & events
Interrupt |
The CPU needs to participate in the interrupt service function of the software to complete the result after the interrupt |
event |
The pulse generator generates a pulse, and the hardware automatically completes the result of this event. Of course, the corresponding linkage components need to be set up first, such as causing DMA operation, AD conversion... etc. |
Simple example
External I/O triggers AD conversion to measure the weight of external items; if you use the traditional interrupt channel, you need to trigger the I/O to generate an external interrupt, the external interrupt service program starts the AD conversion, and the AD conversion completes the interrupt service program to submit the final result; if yes Using the event channel, I/O triggers to generate events, and then linkage triggers AD conversion, and the AD conversion completes the interrupt service program to submit the final result; in contrast, the latter does not require software to participate in AD triggering, and the response speed is also faster; if you use events By triggering DMA operation, some linkage tasks can be completed without software involvement.
Why clear the interrupt flag bit in the interrupt service function?
If entering the interrupt does not clear the flag bit, then after the interrupt service routine ends, because the flag bit is still set and the interrupt is allowed, then the interrupt will be entered again, and the interrupt program will always be executed.
Why should I enable AFIO related functions in APB2 when configuring the interrupt function?
Registers related to AFIO
Event control register (AFIO_EVCR) |
Multiplexing remapping and debugging I/O configuration register (AFIO_MAPR) |
External interrupt configuration register 1 (AFIO_EXTICR1) |
External interrupt configuration register 2 (AFIO_EXTICR2) |
External interrupt configuration register 3 (AFIO_EXTICR3) |
External interrupt configuration register 4 (AFIO_EXTICR4) |
Note: AFIO originally means "Alternate Function IO", not just for port remapping. As long as it is before reading and writing the registers AFIO_EVCR, AFIO_MAPR and AFIO_EXTICRX, the AFIO clock must be turned on, not just when remapping! ! !
The difference between remapping and port reuse
Port reuse |
As long as stm32 is used, peripherals are needed. Peripherals are shared (multiplexed) with GPIO pins, that is, some pins can be used as input and output, or as peripherals with certain functions (such as ADC, serial port) Etc.) pin port |
Port remapping |
The multiplexing function (AFIO) is derived from different GPIO pins. Stm32 introduces the concept of peripheral pin remapping. The built-in peripheral ports generally have default pins. You can also set the remapping register to change the Port mapping to other pins |
Code example
Main.c
#include "led.h"
#include "exti.h"
#include "key.h"
#include "stm32f10x.h"
int main()
{
LED_InitConfig();
KEY_InitConfig();
EXTI_InitConfig();
while(1);
}
void EXTI4_IRQHandler()
{
if(EXTI_GetITStatus(EXTI_Line4) == SET) // 如果中断标志位为1,说明中断触发
{
LED0 = !LED0;
}
EXTI_ClearITPendingBit(EXTI_Line4); // 清除中断标志位
}
LED.c
#include "led.h"
#include "stm32f10x.h"
void LED_InitConfig()
{
GPIO_InitTypeDef GPIO_InitStructure;
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE); // 使能GPIOB的外部时钟
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; // 配置LED0的属性
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOB, &GPIO_InitStructure);
GPIO_SetBits(GPIOB, GPIO_Pin_5); // 初始化LED0的电平
}
LED.h
#ifndef _LED_H
#define _LED_H
#include "sys.h"
void LED_InitConfig();
#define LED0 PBout(5)
#endif
KEY.c
#include "key.h"
#include "stm32f10x.h"
void KEY_InitConfig()
{
GPIO_InitTypeDef GPIO_InitStructure;
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOE, ENABLE); // 使能GPIOE的时钟
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU; // 配置KEY0的属性
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOE, &GPIO_InitStructure);
}
KEY.h
#ifndef _KEY_H
#define _KEY_H
void KEY_InitConfig();
#endif
EXTI.c
#include "exti.h"
#include "key.h"
#include "stm32f10x.h"
void EXTI_InitConfig()
{
NVIC_InitTypeDef NVIC_InitStructure;
EXTI_InitTypeDef EXTI_InitStructure;
KEY_InitConfig(); // 初始化KEY0
RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE); // 使能AFIO时钟
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2); // 配置中断分组
NVIC_InitStructure.NVIC_IRQChannel = EXTI4_IRQn; // 配置中断优先级,使能中断通道
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
NVIC_Init(&NVIC_InitStructure);
GPIO_EXTILineConfig(GPIO_PortSourceGPIOE, GPIO_PinSource4); // 配置GPIO端口引脚与中断线的关系
EXTI_InitStructure.EXTI_Line = EXTI_Line4; // EXTI外部中断初始化配置
EXTI_InitStructure.EXTI_LineCmd = ENABLE;
EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;
EXTI_Init(&EXTI_InitStructure);
}
EXTI.h
#ifndef _EXTI_H
#define _EXTI_H
void EXTI_InitConfig();
#endif