volatile principles and implementation mechanisms || volatile in the end how to ensure visibility and prohibit instruction reordering?

The following excerpt "in-depth understanding of the Java virtual machine":

"Observation was added and no added volatile keyword volatile keyword generated assembly code found is added the volatile keyword, a lock will be more prefix instructions"

prefix instruction effectively lock a memory barrier (barrier also as memory), a memory barrier would provide three functions:

1) It does not ensure that the instruction following instruction to its discharged position before the memory barrier when reordering, nor will later discharged preceding instruction memory barrier; i.e., when performing the memory barrier command sentence, it all the foregoing operation has been completed;

2) It will be forced to modify the operation immediately written to the cache main memory;

3) If it is a write operation, it will invalidate the other CPU in the corresponding cache line.

Address reprint:
https://my.oschina.net/134596/blog/3039647

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Origin blog.csdn.net/qq_45287265/article/details/105055068